Electroplated interconnection structures on integrated circuit chips
A process is described for the fabrication of submicron interconnect structures for integrated circuit chips. Void-free and seamless conductors are obtained by electroplating Cu from baths that contain additives and are conventionally used to deposit level, bright, ductile, and low-stress Cu metal....
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| creator | HORKANS WILMA JEAN HU CHAO-KUN HURD JEFFREY LOUIS ANDRICACOS PANAYOTIS CONSTANTINOU DELIGIANNI HARIKLIA RODBELL KENNETH PARKER DUKOVIC JOHN OWEN WONG KWONG-HON EDELSTEIN DANIEL CHARLES UZOH CYPRIAN EMEKA |
| description | A process is described for the fabrication of submicron interconnect structures for integrated circuit chips. Void-free and seamless conductors are obtained by electroplating Cu from baths that contain additives and are conventionally used to deposit level, bright, ductile, and low-stress Cu metal. The capability of this method to superfill features without leaving voids or seams is unique and superior to that of other deposition approaches. The electromigration resistance of structures making use of CU electroplated in this manner is superior to the electromigration resistance of AlCu structures or structures fabricated using Cu deposited by methods other than electroplating. |
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| subjects | APPARATUS THEREFOR BASIC ELECTRIC ELEMENTS CHEMISTRY ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY ELECTROFORMING ELECTROLYTIC OR ELECTROPHORETIC PROCESSES METALLURGY PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTIONOF COATINGS SEMICONDUCTOR DEVICES |
| title | Electroplated interconnection structures on integrated circuit chips |
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