Method and apparatus of stress relief in semiconductor structures

A method, apparatus and system are provided for relieving stress in the via structures of semiconductor structures whenever a linewidth below a via is larger than a ground-rule, including providing a via at least as large as the groundrule, providing a landing pad above the via, providing a via bar...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	HIERLEMANN MATTHIAS, KALTALIOGLU ERDEM, HOINKIS MARK, FRIESE GERALD, WARNER DENNIS J, COWLEY ANDY
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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