Systems and methods for scheduling memory requests utilizing multi-level arbitration

In an embodiment, a memory scheduler is provided to process memory requests. The memory scheduler may comprise: a plurality of arbitrators that each select memory requests according to age of the memory requests and whether resources are available for the memory requests; and a second-level arbitrat...

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Hauptverfasser: WASTLICK JOHN M, DUGAN MICHAEL K
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creator WASTLICK JOHN M
DUGAN MICHAEL K
description In an embodiment, a memory scheduler is provided to process memory requests. The memory scheduler may comprise: a plurality of arbitrators that each select memory requests according to age of the memory requests and whether resources are available for the memory requests; and a second-level arbitrator that selects, for an arbitration round, a series of memory requests made available by the plurality of arbitrators, wherein the second-level arbitrator begins the arbitration round by selecting a memory request from a least recently used (LRU) arbitrator of the plurality of arbitrators.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2004225847A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2004225847A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2004225847A13</originalsourceid><addsrcrecordid>eNqNikEKwjAQAHPxIOofFjwXaqzoVUTx3nousd22gU1Ssxuhvl4RH-BpYGbmqionFnQMxrfgUIbQMnQhAjcDtoms7z_ahThBxEdCFoYkluzrWxKJzQifSGDi3Uo0YoNfqllniHH140KtL-fqdM1wDDXyaBr0KPWt1HleaL07FPvjZvvf9QYHOzri</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Systems and methods for scheduling memory requests utilizing multi-level arbitration</title><source>esp@cenet</source><creator>WASTLICK JOHN M ; DUGAN MICHAEL K</creator><creatorcontrib>WASTLICK JOHN M ; DUGAN MICHAEL K</creatorcontrib><description>In an embodiment, a memory scheduler is provided to process memory requests. The memory scheduler may comprise: a plurality of arbitrators that each select memory requests according to age of the memory requests and whether resources are available for the memory requests; and a second-level arbitrator that selects, for an arbitration round, a series of memory requests made available by the plurality of arbitrators, wherein the second-level arbitrator begins the arbitration round by selecting a memory request from a least recently used (LRU) arbitrator of the plurality of arbitrators.</description><edition>7</edition><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2004</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20041111&amp;DB=EPODOC&amp;CC=US&amp;NR=2004225847A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20041111&amp;DB=EPODOC&amp;CC=US&amp;NR=2004225847A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>WASTLICK JOHN M</creatorcontrib><creatorcontrib>DUGAN MICHAEL K</creatorcontrib><title>Systems and methods for scheduling memory requests utilizing multi-level arbitration</title><description>In an embodiment, a memory scheduler is provided to process memory requests. The memory scheduler may comprise: a plurality of arbitrators that each select memory requests according to age of the memory requests and whether resources are available for the memory requests; and a second-level arbitrator that selects, for an arbitration round, a series of memory requests made available by the plurality of arbitrators, wherein the second-level arbitrator begins the arbitration round by selecting a memory request from a least recently used (LRU) arbitrator of the plurality of arbitrators.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2004</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNikEKwjAQAHPxIOofFjwXaqzoVUTx3nousd22gU1Ssxuhvl4RH-BpYGbmqionFnQMxrfgUIbQMnQhAjcDtoms7z_ahThBxEdCFoYkluzrWxKJzQifSGDi3Uo0YoNfqllniHH140KtL-fqdM1wDDXyaBr0KPWt1HleaL07FPvjZvvf9QYHOzri</recordid><startdate>20041111</startdate><enddate>20041111</enddate><creator>WASTLICK JOHN M</creator><creator>DUGAN MICHAEL K</creator><scope>EVB</scope></search><sort><creationdate>20041111</creationdate><title>Systems and methods for scheduling memory requests utilizing multi-level arbitration</title><author>WASTLICK JOHN M ; DUGAN MICHAEL K</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2004225847A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2004</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>WASTLICK JOHN M</creatorcontrib><creatorcontrib>DUGAN MICHAEL K</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>WASTLICK JOHN M</au><au>DUGAN MICHAEL K</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Systems and methods for scheduling memory requests utilizing multi-level arbitration</title><date>2004-11-11</date><risdate>2004</risdate><abstract>In an embodiment, a memory scheduler is provided to process memory requests. The memory scheduler may comprise: a plurality of arbitrators that each select memory requests according to age of the memory requests and whether resources are available for the memory requests; and a second-level arbitrator that selects, for an arbitration round, a series of memory requests made available by the plurality of arbitrators, wherein the second-level arbitrator begins the arbitration round by selecting a memory request from a least recently used (LRU) arbitrator of the plurality of arbitrators.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record>
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Systems and methods for scheduling memory requests utilizing multi-level arbitration
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-04T05%3A12%3A10IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=WASTLICK%20JOHN%20M&rft.date=2004-11-11&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2004225847A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true