Electronic structures with reduced capacitance

An apparatus and method is described incorporating one or more layers of SiCOH and one or more layers of patterned conductors in an integrated circuit chip. The invention overcomes the problem of capacitance by lowering the k of the delectric and overcomes the problem of breakdown voltage and the le...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: GRILL ALFRED, GATES STEPHEN MCCONNELL
Format: Patent
Sprache:eng
Schlagworte:
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