Instruction queue for an instruction pipeline

Instruction queue for an instruction pipeline

An instruction pipeline in a microprocessor, comprising a plurality of pipeline units with each of the pipeline units processing instructions. At least one of the plurality of pipeline units receives the instructions from another of the pipeline units, stores the instructions and reissues at least o...

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Hauptverfasser: ROHLMAN JOSEPH, SABBAVARAPU ANIL, KRICK ROBERT F
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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creator ROHLMAN JOSEPH
SABBAVARAPU ANIL
KRICK ROBERT F
description An instruction pipeline in a microprocessor, comprising a plurality of pipeline units with each of the pipeline units processing instructions. At least one of the plurality of pipeline units receives the instructions from another of the pipeline units, stores the instructions and reissues at least one of the instructions after a stall occurs in the instruction pipeline.
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Instruction queue for an instruction pipeline
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