Semiconductor wafers having asymmetric edge profiles that facilitate high yield processing by inhibiting particulate contamination and methods of forming same

Semiconductor wafers utilize asymmetric edge profiles (EP) to facilitate higher yield semiconductor device processing. These edge profiles are configured to reduce the volume of thin film residues that may form on a top surface of a semiconductor wafer at locations adjacent a peripheral edge thereof...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
Hauptverfasser:	KIM WOO-SERK, KIM GI-JUNG, CHON SANG-MUN, HEO TAE-YEOL
Format:	Patent
Sprache:	eng
Schlagworte:	AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUSPOLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE APPARATUS THEREFOR BASIC ELECTRIC ELEMENTS CHEMISTRY CRYSTAL GROWTH DRESSING OR CONDITIONING OF ABRADING SURFACES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS GRINDING MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING METALLURGY PERFORMING OPERATIONS POLISHING PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITHDEFINED STRUCTURE REFINING BY ZONE-MELTING OF MATERIAL SEMICONDUCTOR DEVICES SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITHDEFINED STRUCTURE SINGLE-CRYSTAL-GROWTH TRANSPORTING UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL ORUNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

Schreiben Sie den ersten Kommentar!