Structures and methods for selectively applying a well bias to portions of a programmable device

Structures and methods for selectively applying a well bias to only those portions of a PLD where such a bias is necessary or desirable, e.g., applying a positive well bias to transistors on critical paths within a user's design. A substrate for an integrated circuit includes a plurality of wel...

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Bibliographische Detailangaben
Hauptverfasser: YOUNG STEVEN P, TRIMBERGER STEPHEN M, HART MICHAEL J
Format: Patent
Sprache:eng
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