ON-CHIP MULTIPLE TAP TRANSFORMER AND INDUCTOR
An on-chip multiple tap transformer balun includes a 1 winding and a 2 winding having two portions. The 1 winding is on a 1 layer of an integrated circuit and is operably coupled for a single ended signal. The 1 and 2 portions of the 2 winding are on a 2 layer of the integrated circuit. The 1 portio...
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| creator | YANG HUNG YU BHATTI IQBAL S CASTANEDA JESUS A ROFOUGARAN ROZIEH |
| description | An on-chip multiple tap transformer balun includes a 1 winding and a 2 winding having two portions. The 1 winding is on a 1 layer of an integrated circuit and is operably coupled for a single ended signal. The 1 and 2 portions of the 2 winding are on a 2 layer of the integrated circuit. The 1 portion of the 2 winding includes a 1 node, a 2 node, and a tap. The 1 node is operably coupled to receive a 1 leg of a 1 differential signal and the 2 node is coupled to a reference potential. The tap of the 1 portion is operably coupled for a 1 leg of a 2 differential signal. The 2 portion of the 2 winding includes a 1 node, 2 node, and tap. The 1 node is operably coupled to receive a 2 leg of the 1 differential signal and the 2 node is operably coupled to the reference potential. The tap of the 2 portion is coupled for a 2 leg of the 2 differential signal. The 1 and 2 portions of the 2 winding are symmetrical with respect to the 1 and 2 nodes and with respect to the tap nodes. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2004017278A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2004017278A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2004017278A13</originalsourceid><addsrcrecordid>eNrjZND199N19vAMUPAN9QnxDPBxVQhxDFAICXL0C3bzD_J1DVJw9HNR8PRzCXUO8Q_iYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBgYmBobmRuYWjobGxKkCAFhhJnM</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>ON-CHIP MULTIPLE TAP TRANSFORMER AND INDUCTOR</title><source>esp@cenet</source><creator>YANG HUNG YU ; BHATTI IQBAL S ; CASTANEDA JESUS A ; ROFOUGARAN ROZIEH</creator><creatorcontrib>YANG HUNG YU ; BHATTI IQBAL S ; CASTANEDA JESUS A ; ROFOUGARAN ROZIEH</creatorcontrib><description>An on-chip multiple tap transformer balun includes a 1 winding and a 2 winding having two portions. The 1 winding is on a 1 layer of an integrated circuit and is operably coupled for a single ended signal. The 1 and 2 portions of the 2 winding are on a 2 layer of the integrated circuit. The 1 portion of the 2 winding includes a 1 node, a 2 node, and a tap. The 1 node is operably coupled to receive a 1 leg of a 1 differential signal and the 2 node is coupled to a reference potential. The tap of the 1 portion is operably coupled for a 1 leg of a 2 differential signal. The 2 portion of the 2 winding includes a 1 node, 2 node, and tap. The 1 node is operably coupled to receive a 2 leg of the 1 differential signal and the 2 node is operably coupled to the reference potential. The tap of the 2 portion is coupled for a 2 leg of the 2 differential signal. The 1 and 2 portions of the 2 winding are symmetrical with respect to the 1 and 2 nodes and with respect to the tap nodes.</description><edition>7</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; BASIC ELECTRONIC CIRCUITRY ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS ; INDUCTANCES ; MAGNETS ; RESONATORS ; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES ; SEMICONDUCTOR DEVICES ; TRANSFORMERS</subject><creationdate>2004</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20040129&DB=EPODOC&CC=US&NR=2004017278A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20040129&DB=EPODOC&CC=US&NR=2004017278A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>YANG HUNG YU</creatorcontrib><creatorcontrib>BHATTI IQBAL S</creatorcontrib><creatorcontrib>CASTANEDA JESUS A</creatorcontrib><creatorcontrib>ROFOUGARAN ROZIEH</creatorcontrib><title>ON-CHIP MULTIPLE TAP TRANSFORMER AND INDUCTOR</title><description>An on-chip multiple tap transformer balun includes a 1 winding and a 2 winding having two portions. The 1 winding is on a 1 layer of an integrated circuit and is operably coupled for a single ended signal. The 1 and 2 portions of the 2 winding are on a 2 layer of the integrated circuit. The 1 portion of the 2 winding includes a 1 node, a 2 node, and a tap. The 1 node is operably coupled to receive a 1 leg of a 1 differential signal and the 2 node is coupled to a reference potential. The tap of the 1 portion is operably coupled for a 1 leg of a 2 differential signal. The 2 portion of the 2 winding includes a 1 node, 2 node, and tap. The 1 node is operably coupled to receive a 2 leg of the 1 differential signal and the 2 node is operably coupled to the reference potential. The tap of the 2 portion is coupled for a 2 leg of the 2 differential signal. The 1 and 2 portions of the 2 winding are symmetrical with respect to the 1 and 2 nodes and with respect to the tap nodes.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS</subject><subject>INDUCTANCES</subject><subject>MAGNETS</subject><subject>RESONATORS</subject><subject>SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>TRANSFORMERS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2004</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZND199N19vAMUPAN9QnxDPBxVQhxDFAICXL0C3bzD_J1DVJw9HNR8PRzCXUO8Q_iYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBgYmBobmRuYWjobGxKkCAFhhJnM</recordid><startdate>20040129</startdate><enddate>20040129</enddate><creator>YANG HUNG YU</creator><creator>BHATTI IQBAL S</creator><creator>CASTANEDA JESUS A</creator><creator>ROFOUGARAN ROZIEH</creator><scope>EVB</scope></search><sort><creationdate>20040129</creationdate><title>ON-CHIP MULTIPLE TAP TRANSFORMER AND INDUCTOR</title><author>YANG HUNG YU ; BHATTI IQBAL S ; CASTANEDA JESUS A ; ROFOUGARAN ROZIEH</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2004017278A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2004</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS</topic><topic>INDUCTANCES</topic><topic>MAGNETS</topic><topic>RESONATORS</topic><topic>SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>TRANSFORMERS</topic><toplevel>online_resources</toplevel><creatorcontrib>YANG HUNG YU</creatorcontrib><creatorcontrib>BHATTI IQBAL S</creatorcontrib><creatorcontrib>CASTANEDA JESUS A</creatorcontrib><creatorcontrib>ROFOUGARAN ROZIEH</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>YANG HUNG YU</au><au>BHATTI IQBAL S</au><au>CASTANEDA JESUS A</au><au>ROFOUGARAN ROZIEH</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>ON-CHIP MULTIPLE TAP TRANSFORMER AND INDUCTOR</title><date>2004-01-29</date><risdate>2004</risdate><abstract>An on-chip multiple tap transformer balun includes a 1 winding and a 2 winding having two portions. The 1 winding is on a 1 layer of an integrated circuit and is operably coupled for a single ended signal. The 1 and 2 portions of the 2 winding are on a 2 layer of the integrated circuit. The 1 portion of the 2 winding includes a 1 node, a 2 node, and a tap. The 1 node is operably coupled to receive a 1 leg of a 1 differential signal and the 2 node is coupled to a reference potential. The tap of the 1 portion is operably coupled for a 1 leg of a 2 differential signal. The 2 portion of the 2 winding includes a 1 node, 2 node, and tap. The 1 node is operably coupled to receive a 2 leg of the 1 differential signal and the 2 node is operably coupled to the reference potential. The tap of the 2 portion is coupled for a 2 leg of the 2 differential signal. The 1 and 2 portions of the 2 winding are symmetrical with respect to the 1 and 2 nodes and with respect to the tap nodes.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS BASIC ELECTRONIC CIRCUITRY ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS INDUCTANCES MAGNETS RESONATORS SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES SEMICONDUCTOR DEVICES TRANSFORMERS |
| title | ON-CHIP MULTIPLE TAP TRANSFORMER AND INDUCTOR |
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