Synchronous low voltage differential I/O buss
The present invention is directed to a synchronous I/O interface buss system. The system includes a master-buss controller that generates a system timing signal. The master-buss controller transmits a time-division multiplexed (TDM) slave output data signal and receives a time-division multiplexed (...
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| creator | OLSON JACK E BOLLINGER JOE C RATHBONE JOHN T |
| description | The present invention is directed to a synchronous I/O interface buss system. The system includes a master-buss controller that generates a system timing signal. The master-buss controller transmits a time-division multiplexed (TDM) slave output data signal and receives a time-division multiplexed (TDM) slave input data signal. The TDM slave output data signal and the TDM slave input data signal are synchronous relative to the system timing signal. A buss is coupled to the master-buss controller. The buss propagates the system timing signal, the TDM slave output data signal, and the TDM slave input data signal. At least one slave device is coupled to the buss. The at least one slave device is in synchronicity with the system timing signal. The at least one slave device demultiplexed slave device output data in device-ready format from the TDM slave output data signal during a predetermined output data signal time slot. The at least one slave device also multiplexes slave input data in file-ready format into the TDM slave input data signal during a predetermined input data signal time slot. |
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The system includes a master-buss controller that generates a system timing signal. The master-buss controller transmits a time-division multiplexed (TDM) slave output data signal and receives a time-division multiplexed (TDM) slave input data signal. The TDM slave output data signal and the TDM slave input data signal are synchronous relative to the system timing signal. A buss is coupled to the master-buss controller. The buss propagates the system timing signal, the TDM slave output data signal, and the TDM slave input data signal. At least one slave device is coupled to the buss. The at least one slave device is in synchronicity with the system timing signal. The at least one slave device demultiplexed slave device output data in device-ready format from the TDM slave output data signal during a predetermined output data signal time slot. The at least one slave device also multiplexes slave input data in file-ready format into the TDM slave input data signal during a predetermined input data signal time slot.</description><edition>7</edition><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2003</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20030918&DB=EPODOC&CC=US&NR=2003174724A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20030918&DB=EPODOC&CC=US&NR=2003174724A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>OLSON JACK E</creatorcontrib><creatorcontrib>BOLLINGER JOE C</creatorcontrib><creatorcontrib>RATHBONE JOHN T</creatorcontrib><title>Synchronous low voltage differential I/O buss</title><description>The present invention is directed to a synchronous I/O interface buss system. The system includes a master-buss controller that generates a system timing signal. The master-buss controller transmits a time-division multiplexed (TDM) slave output data signal and receives a time-division multiplexed (TDM) slave input data signal. The TDM slave output data signal and the TDM slave input data signal are synchronous relative to the system timing signal. A buss is coupled to the master-buss controller. The buss propagates the system timing signal, the TDM slave output data signal, and the TDM slave input data signal. At least one slave device is coupled to the buss. The at least one slave device is in synchronicity with the system timing signal. The at least one slave device demultiplexed slave device output data in device-ready format from the TDM slave output data signal during a predetermined output data signal time slot. The at least one slave device also multiplexes slave input data in file-ready format into the TDM slave input data signal during a predetermined input data signal time slot.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2003</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNANrsxLzijKz8svLVbIyS9XKMvPKUlMT1VIyUxLSy1KzSvJTMxR8NT3V0gqLS7mYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBgbGhuYm5kYmjobGxKkCAHULKwQ</recordid><startdate>20030918</startdate><enddate>20030918</enddate><creator>OLSON JACK E</creator><creator>BOLLINGER JOE C</creator><creator>RATHBONE JOHN T</creator><scope>EVB</scope></search><sort><creationdate>20030918</creationdate><title>Synchronous low voltage differential I/O buss</title><author>OLSON JACK E ; BOLLINGER JOE C ; RATHBONE JOHN T</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2003174724A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2003</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>OLSON JACK E</creatorcontrib><creatorcontrib>BOLLINGER JOE C</creatorcontrib><creatorcontrib>RATHBONE JOHN T</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>OLSON JACK E</au><au>BOLLINGER JOE C</au><au>RATHBONE JOHN T</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Synchronous low voltage differential I/O buss</title><date>2003-09-18</date><risdate>2003</risdate><abstract>The present invention is directed to a synchronous I/O interface buss system. The system includes a master-buss controller that generates a system timing signal. The master-buss controller transmits a time-division multiplexed (TDM) slave output data signal and receives a time-division multiplexed (TDM) slave input data signal. The TDM slave output data signal and the TDM slave input data signal are synchronous relative to the system timing signal. A buss is coupled to the master-buss controller. The buss propagates the system timing signal, the TDM slave output data signal, and the TDM slave input data signal. At least one slave device is coupled to the buss. The at least one slave device is in synchronicity with the system timing signal. The at least one slave device demultiplexed slave device output data in device-ready format from the TDM slave output data signal during a predetermined output data signal time slot. The at least one slave device also multiplexes slave input data in file-ready format into the TDM slave input data signal during a predetermined input data signal time slot.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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| language | eng |
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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | Synchronous low voltage differential I/O buss |
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