Method for filling depressions on a semiconductor wafer

A method is disclosed for filling a depression between two vertically adjoining semiconductor layers, in particular an edge depression arising in the context of an isolation trench formation. A covering layer, preferably made of silicon oxide, is deposited in a large-area manner and is then doped wi...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	EFFERENN DIRK, MOLL HANS-PETER
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
Online-Zugang:	Volltext bestellen
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