Decision directed phase locked loops (DD-PLL) with excess processing power in digital communication systems

A decoder of a data signal subjected to phase shifting keying (PSK) modulation uses a plurality of phase locked loops (801-1 to 801-n) having an inner decoder for short block codes, at least one of which is adapted to apply excess processing power to process a selected burst of the data signal, such...

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Bibliographische Detailangaben
Hauptverfasser: GOLSHAN ALI R, LINSKY STUART T, COOPER SCOTT A, WALKER CHRISTOPHER W
Format: Patent
Sprache:eng
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