Dynamic clock generator with rising edge alignment enable signal

A method and apparatus for providing a dynamically alterable output clock from an input clock based on the value of an integer, where the integer can be modified continuously. The invention also provides a sample cycle output which is an enable pulse, having the width of the input clock cycle, that...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: MACDONALD ERIC WILLIAM, CASWELL AMANDA CHRISTINE, BROCK BISHOP CHAPMAN, CARPENTER GARY DALE, RUBIDOUX TIMOTHY JOE
Format: Patent
Sprache:eng
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