High security host adapter

A host adapter connected between first and second buses, the first bus connected to a system memory or a central processing unit (CPU), the second bus connected to a storage apparatus. The host adapter includes first and second encryption/decryption processors and a first-in-first-out (FIFO) buffer....

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	JEONG JACHOON, EOM JEAHONG, CHOI HUNKYU, CHU EUGENE, LEE PYEONGHAN, KIM JOSEPH, HWANG MARTY
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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