Direct memory access controller for converting a transfer mode flexibly in accordance with a data transfer counter value

A DMA controller includes a burst/single mode control circuit for automatically converting a DMA transfer operation mode to a burst mode and/or a single mode regardless of a data transfer counter value, and for performing the DMA transfer operation. The burst/single mode control circuit carries out...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
1. Verfasser:	KU YONG-GUEN
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

container_end_page
container_issue
container_start_page
container_title
container_volume
creator	KU YONG-GUEN
description	A DMA controller includes a burst/single mode control circuit for automatically converting a DMA transfer operation mode to a burst mode and/or a single mode regardless of a data transfer counter value, and for performing the DMA transfer operation. The burst/single mode control circuit carries out the burst mode DMA transfer operation without the need for a control operation of the CPU a number of times corresponding to a quotient which is the result that the data transfer counter value divided by the burst length, and carries out successively the single mode DMA transfer operation by the number of times corresponding to the remainder of the division.
format	Patent
fullrecord	<record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2002133645A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2002133645A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2002133645A13</originalsourceid><addsrcrecordid>eNqNi7sKwkAQRdNYiPoPA9ZCHmovPrBXaxk3s7qw2Qmzk5j8vQlYWFodLvecadIdnJBRqKhi6QGNoRjBcFBh70nAsoyzJVEXnoCggiHa4am4JLCeOvfwPbgwxiwlBkPwdvoa3BL1JzDcBB3Yom9onkws-kiLL2fJ8nS87s8rqvlOsUZDgfR-u-RpmmdFsV1vdlnxn_UBAsJHdA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Direct memory access controller for converting a transfer mode flexibly in accordance with a data transfer counter value</title><source>esp@cenet</source><creator>KU YONG-GUEN</creator><creatorcontrib>KU YONG-GUEN</creatorcontrib><description>A DMA controller includes a burst/single mode control circuit for automatically converting a DMA transfer operation mode to a burst mode and/or a single mode regardless of a data transfer counter value, and for performing the DMA transfer operation. The burst/single mode control circuit carries out the burst mode DMA transfer operation without the need for a control operation of the CPU a number of times corresponding to a quotient which is the result that the data transfer counter value divided by the burst length, and carries out successively the single mode DMA transfer operation by the number of times corresponding to the remainder of the division.</description><edition>7</edition><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2002</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20020919&DB=EPODOC&CC=US&NR=2002133645A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20020919&DB=EPODOC&CC=US&NR=2002133645A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KU YONG-GUEN</creatorcontrib><title>Direct memory access controller for converting a transfer mode flexibly in accordance with a data transfer counter value</title><description>A DMA controller includes a burst/single mode control circuit for automatically converting a DMA transfer operation mode to a burst mode and/or a single mode regardless of a data transfer counter value, and for performing the DMA transfer operation. The burst/single mode control circuit carries out the burst mode DMA transfer operation without the need for a control operation of the CPU a number of times corresponding to a quotient which is the result that the data transfer counter value divided by the burst length, and carries out successively the single mode DMA transfer operation by the number of times corresponding to the remainder of the division.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2002</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNi7sKwkAQRdNYiPoPA9ZCHmovPrBXaxk3s7qw2Qmzk5j8vQlYWFodLvecadIdnJBRqKhi6QGNoRjBcFBh70nAsoyzJVEXnoCggiHa4am4JLCeOvfwPbgwxiwlBkPwdvoa3BL1JzDcBB3Yom9onkws-kiLL2fJ8nS87s8rqvlOsUZDgfR-u-RpmmdFsV1vdlnxn_UBAsJHdA</recordid><startdate>20020919</startdate><enddate>20020919</enddate><creator>KU YONG-GUEN</creator><scope>EVB</scope></search><sort><creationdate>20020919</creationdate><title>Direct memory access controller for converting a transfer mode flexibly in accordance with a data transfer counter value</title><author>KU YONG-GUEN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2002133645A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2002</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>KU YONG-GUEN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KU YONG-GUEN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Direct memory access controller for converting a transfer mode flexibly in accordance with a data transfer counter value</title><date>2002-09-19</date><risdate>2002</risdate><abstract>A DMA controller includes a burst/single mode control circuit for automatically converting a DMA transfer operation mode to a burst mode and/or a single mode regardless of a data transfer counter value, and for performing the DMA transfer operation. The burst/single mode control circuit carries out the burst mode DMA transfer operation without the need for a control operation of the CPU a number of times corresponding to a quotient which is the result that the data transfer counter value divided by the burst length, and carries out successively the single mode DMA transfer operation by the number of times corresponding to the remainder of the division.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record>
fulltext	fulltext_linktorsrc
identifier
ispartof
issn
language	eng
recordid	cdi_epo_espacenet_US2002133645A1
source	esp@cenet
subjects	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
title	Direct memory access controller for converting a transfer mode flexibly in accordance with a data transfer counter value
url	https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-19T08%3A14%3A50IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=KU%20YONG-GUEN&rft.date=2002-09-19&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2002133645A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true