Memory aliasing in a processor system

A data processor and storage system which comprises a data processor, a cache memory and a main memory is arranged so that the addressing of the main memory produces a multiplicity of spaced aliases, the multiplicity being greater than the set-associativity of the cache memory

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Hauptverfasser: TURNER EDWARD, DONOGHUE BRYAN J, GRIFFITHS VICTORIA A, LAM TIN, HARRISON LEE C
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creator TURNER EDWARD
DONOGHUE BRYAN J
GRIFFITHS VICTORIA A
LAM TIN
HARRISON LEE C
description A data processor and storage system which comprises a data processor, a cache memory and a main memory is arranged so that the addressing of the main memory produces a multiplicity of spaced aliases, the multiplicity being greater than the set-associativity of the cache memory
format Patent
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Memory aliasing in a processor system
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