Universal disk array controller
A disk array controller is configured to communicate with the PCI-based host computer with a known standard PCI protocol. The standard PCI protocol typically defines a message provided for the disk array controller to negotiate with the PCI-based host computer. The message is represented by the PCI...
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| creator | TSAI VINCENT WANG LIAN-RONG HUANG SU-SYAN |
| description | A disk array controller is configured to communicate with the PCI-based host computer with a known standard PCI protocol. The standard PCI protocol typically defines a message provided for the disk array controller to negotiate with the PCI-based host computer. The message is represented by the PCI class code. By programming the PCI class code register in the PCI configuration space register (offset address 09H-0BH) with appropriate hex codes, the disk array controller will be identified as a stand PCI bus master IDE controller, and can be driven by the PCI bus master IDE controller driver utility, which is built in most of the PC-based operating system. |
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The standard PCI protocol typically defines a message provided for the disk array controller to negotiate with the PCI-based host computer. The message is represented by the PCI class code. By programming the PCI class code register in the PCI configuration space register (offset address 09H-0BH) with appropriate hex codes, the disk array controller will be identified as a stand PCI bus master IDE controller, and can be driven by the PCI bus master IDE controller driver utility, which is built in most of the PC-based operating system.</description><edition>7</edition><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2002</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20020627&DB=EPODOC&CC=US&NR=2002083221A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20020627&DB=EPODOC&CC=US&NR=2002083221A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>TSAI VINCENT</creatorcontrib><creatorcontrib>WANG LIAN-RONG</creatorcontrib><creatorcontrib>HUANG SU-SYAN</creatorcontrib><title>Universal disk array controller</title><description>A disk array controller is configured to communicate with the PCI-based host computer with a known standard PCI protocol. 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By programming the PCI class code register in the PCI configuration space register (offset address 09H-0BH) with appropriate hex codes, the disk array controller will be identified as a stand PCI bus master IDE controller, and can be driven by the PCI bus master IDE controller driver utility, which is built in most of the PC-based operating system.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2002</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJAPzcssSy0qTsxRSMkszlZILCpKrFRIzs8rKcrPyUkt4mFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8aHBRgYGRgYWxkZGho6GxsSpAgDXrSYJ</recordid><startdate>20020627</startdate><enddate>20020627</enddate><creator>TSAI VINCENT</creator><creator>WANG LIAN-RONG</creator><creator>HUANG SU-SYAN</creator><scope>EVB</scope></search><sort><creationdate>20020627</creationdate><title>Universal disk array controller</title><author>TSAI VINCENT ; WANG LIAN-RONG ; HUANG SU-SYAN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2002083221A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2002</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>TSAI VINCENT</creatorcontrib><creatorcontrib>WANG LIAN-RONG</creatorcontrib><creatorcontrib>HUANG SU-SYAN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>TSAI VINCENT</au><au>WANG LIAN-RONG</au><au>HUANG SU-SYAN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Universal disk array controller</title><date>2002-06-27</date><risdate>2002</risdate><abstract>A disk array controller is configured to communicate with the PCI-based host computer with a known standard PCI protocol. The standard PCI protocol typically defines a message provided for the disk array controller to negotiate with the PCI-based host computer. The message is represented by the PCI class code. By programming the PCI class code register in the PCI configuration space register (offset address 09H-0BH) with appropriate hex codes, the disk array controller will be identified as a stand PCI bus master IDE controller, and can be driven by the PCI bus master IDE controller driver utility, which is built in most of the PC-based operating system.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | Universal disk array controller |
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