Dynamic random access memory
In order to reduce power consumption in a dynamic random access memory (DRAM), block selection information RBDATA indicating whether or not individual blocks in a memory cell array require a refresh is stored at means for latching 20-1 and 20-2. A means for operation prohibition 30 compares a portio...
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creator | KAI YASUKAZU GOTOH TAKESHI |
description | In order to reduce power consumption in a dynamic random access memory (DRAM), block selection information RBDATA indicating whether or not individual blocks in a memory cell array require a refresh is stored at means for latching 20-1 and 20-2. A means for operation prohibition 30 compares a portion RA8 of a refresh address output by a refresh counter 6 with refresh block specification signals RB (0) and RB (1) output by the means for latching 20-1 and 20-2, makes a decision as to whether or not the block indicated by the refresh address needs to be refreshed and prohibits an operation of an RAS system circuit 11 if it is decided that the block does not need to be refreshed. Thus, a self refresh is not performed for a block that does not need to be refreshed to achieve a reduction in power consumption. |
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A means for operation prohibition 30 compares a portion RA8 of a refresh address output by a refresh counter 6 with refresh block specification signals RB (0) and RB (1) output by the means for latching 20-1 and 20-2, makes a decision as to whether or not the block indicated by the refresh address needs to be refreshed and prohibits an operation of an RAS system circuit 11 if it is decided that the block does not need to be refreshed. Thus, a self refresh is not performed for a block that does not need to be refreshed to achieve a reduction in power consumption.</description><edition>7</edition><language>eng</language><subject>INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2001</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20010913&DB=EPODOC&CC=US&NR=2001021137A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20010913&DB=EPODOC&CC=US&NR=2001021137A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KAI YASUKAZU</creatorcontrib><creatorcontrib>GOTOH TAKESHI</creatorcontrib><title>Dynamic random access memory</title><description>In order to reduce power consumption in a dynamic random access memory (DRAM), block selection information RBDATA indicating whether or not individual blocks in a memory cell array require a refresh is stored at means for latching 20-1 and 20-2. A means for operation prohibition 30 compares a portion RA8 of a refresh address output by a refresh counter 6 with refresh block specification signals RB (0) and RB (1) output by the means for latching 20-1 and 20-2, makes a decision as to whether or not the block indicated by the refresh address needs to be refreshed and prohibits an operation of an RAS system circuit 11 if it is decided that the block does not need to be refreshed. Thus, a self refresh is not performed for a block that does not need to be refreshed to achieve a reduction in power consumption.</description><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2001</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJBxqcxLzM1MVihKzEvJz1VITE5OLS5WyE3NzS-q5GFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8aHBRgYGhgZGhobG5o6GxsSpAgAm9iSK</recordid><startdate>20010913</startdate><enddate>20010913</enddate><creator>KAI YASUKAZU</creator><creator>GOTOH TAKESHI</creator><scope>EVB</scope></search><sort><creationdate>20010913</creationdate><title>Dynamic random access memory</title><author>KAI YASUKAZU ; GOTOH TAKESHI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2001021137A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2001</creationdate><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>KAI YASUKAZU</creatorcontrib><creatorcontrib>GOTOH TAKESHI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KAI YASUKAZU</au><au>GOTOH TAKESHI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Dynamic random access memory</title><date>2001-09-13</date><risdate>2001</risdate><abstract>In order to reduce power consumption in a dynamic random access memory (DRAM), block selection information RBDATA indicating whether or not individual blocks in a memory cell array require a refresh is stored at means for latching 20-1 and 20-2. A means for operation prohibition 30 compares a portion RA8 of a refresh address output by a refresh counter 6 with refresh block specification signals RB (0) and RB (1) output by the means for latching 20-1 and 20-2, makes a decision as to whether or not the block indicated by the refresh address needs to be refreshed and prohibits an operation of an RAS system circuit 11 if it is decided that the block does not need to be refreshed. Thus, a self refresh is not performed for a block that does not need to be refreshed to achieve a reduction in power consumption.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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subjects | INFORMATION STORAGE PHYSICS STATIC STORES |
title | Dynamic random access memory |
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