Microelectronic devices with tiered decks of aligned pillars exhibiting bending and related methods
Microelectronic devices include a lower deck and an upper deck, each comprising a stack structure with a vertically alternating sequence of insulative structures and conductive structures arranged in tiers. First and second arrays of pillars extend through the stack structure of the lower and upper...
Gespeichert in:
Hauptverfasser: | , , , , , , , , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | Kewley, David A Tang, Kok Siak Carlson, Merri L Islam, Mohammad Moydul Zhu, Chao Yang, Zhigang Zhang, Xiaosong Olson, Adam L Ullah, Md Zakir Chong, Hui Chin Tran, Tien Minh Quan |
description | Microelectronic devices include a lower deck and an upper deck, each comprising a stack structure with a vertically alternating sequence of insulative structures and conductive structures arranged in tiers. First and second arrays of pillars extend through the stack structure of the lower and upper decks, respectively. In one or more of the first and second pillar arrays, at least some pillars exhibit a greater degree of bending away from a vertical orientation than at least some other pillars. The pillars of the first array align with the pillars of the second array along an interface between the lower and upper decks. Related methods are also disclosed. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US12178045B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US12178045B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US12178045B23</originalsourceid><addsrcrecordid>eNqNyjEKwkAQRuE0FqLeYTyAYKISa0WxsVLrsJn9kwyuu2F3UI9vBA9g9eDjjTM-C8cAB9YYvDBZPIWR6CXakQoi7GB8TxQaMk5aP0AvzpmYCO9OalHxLdXw9lvjLUU4o8P2gHbBpmk2aoxLmP06yebHw3V_WqAPFVJvGB5a3S55kZfb5XqzK1b_PB_QOT7o</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Microelectronic devices with tiered decks of aligned pillars exhibiting bending and related methods</title><source>esp@cenet</source><creator>Kewley, David A ; Tang, Kok Siak ; Carlson, Merri L ; Islam, Mohammad Moydul ; Zhu, Chao ; Yang, Zhigang ; Zhang, Xiaosong ; Olson, Adam L ; Ullah, Md Zakir ; Chong, Hui Chin ; Tran, Tien Minh Quan</creator><creatorcontrib>Kewley, David A ; Tang, Kok Siak ; Carlson, Merri L ; Islam, Mohammad Moydul ; Zhu, Chao ; Yang, Zhigang ; Zhang, Xiaosong ; Olson, Adam L ; Ullah, Md Zakir ; Chong, Hui Chin ; Tran, Tien Minh Quan</creatorcontrib><description>Microelectronic devices include a lower deck and an upper deck, each comprising a stack structure with a vertically alternating sequence of insulative structures and conductive structures arranged in tiers. First and second arrays of pillars extend through the stack structure of the lower and upper decks, respectively. In one or more of the first and second pillar arrays, at least some pillars exhibit a greater degree of bending away from a vertical orientation than at least some other pillars. The pillars of the first array align with the pillars of the second array along an interface between the lower and upper decks. Related methods are also disclosed.</description><language>eng</language><subject>ELECTRICITY</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20241224&DB=EPODOC&CC=US&NR=12178045B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20241224&DB=EPODOC&CC=US&NR=12178045B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Kewley, David A</creatorcontrib><creatorcontrib>Tang, Kok Siak</creatorcontrib><creatorcontrib>Carlson, Merri L</creatorcontrib><creatorcontrib>Islam, Mohammad Moydul</creatorcontrib><creatorcontrib>Zhu, Chao</creatorcontrib><creatorcontrib>Yang, Zhigang</creatorcontrib><creatorcontrib>Zhang, Xiaosong</creatorcontrib><creatorcontrib>Olson, Adam L</creatorcontrib><creatorcontrib>Ullah, Md Zakir</creatorcontrib><creatorcontrib>Chong, Hui Chin</creatorcontrib><creatorcontrib>Tran, Tien Minh Quan</creatorcontrib><title>Microelectronic devices with tiered decks of aligned pillars exhibiting bending and related methods</title><description>Microelectronic devices include a lower deck and an upper deck, each comprising a stack structure with a vertically alternating sequence of insulative structures and conductive structures arranged in tiers. First and second arrays of pillars extend through the stack structure of the lower and upper decks, respectively. In one or more of the first and second pillar arrays, at least some pillars exhibit a greater degree of bending away from a vertical orientation than at least some other pillars. The pillars of the first array align with the pillars of the second array along an interface between the lower and upper decks. Related methods are also disclosed.</description><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyjEKwkAQRuE0FqLeYTyAYKISa0WxsVLrsJn9kwyuu2F3UI9vBA9g9eDjjTM-C8cAB9YYvDBZPIWR6CXakQoi7GB8TxQaMk5aP0AvzpmYCO9OalHxLdXw9lvjLUU4o8P2gHbBpmk2aoxLmP06yebHw3V_WqAPFVJvGB5a3S55kZfb5XqzK1b_PB_QOT7o</recordid><startdate>20241224</startdate><enddate>20241224</enddate><creator>Kewley, David A</creator><creator>Tang, Kok Siak</creator><creator>Carlson, Merri L</creator><creator>Islam, Mohammad Moydul</creator><creator>Zhu, Chao</creator><creator>Yang, Zhigang</creator><creator>Zhang, Xiaosong</creator><creator>Olson, Adam L</creator><creator>Ullah, Md Zakir</creator><creator>Chong, Hui Chin</creator><creator>Tran, Tien Minh Quan</creator><scope>EVB</scope></search><sort><creationdate>20241224</creationdate><title>Microelectronic devices with tiered decks of aligned pillars exhibiting bending and related methods</title><author>Kewley, David A ; Tang, Kok Siak ; Carlson, Merri L ; Islam, Mohammad Moydul ; Zhu, Chao ; Yang, Zhigang ; Zhang, Xiaosong ; Olson, Adam L ; Ullah, Md Zakir ; Chong, Hui Chin ; Tran, Tien Minh Quan</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US12178045B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>Kewley, David A</creatorcontrib><creatorcontrib>Tang, Kok Siak</creatorcontrib><creatorcontrib>Carlson, Merri L</creatorcontrib><creatorcontrib>Islam, Mohammad Moydul</creatorcontrib><creatorcontrib>Zhu, Chao</creatorcontrib><creatorcontrib>Yang, Zhigang</creatorcontrib><creatorcontrib>Zhang, Xiaosong</creatorcontrib><creatorcontrib>Olson, Adam L</creatorcontrib><creatorcontrib>Ullah, Md Zakir</creatorcontrib><creatorcontrib>Chong, Hui Chin</creatorcontrib><creatorcontrib>Tran, Tien Minh Quan</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Kewley, David A</au><au>Tang, Kok Siak</au><au>Carlson, Merri L</au><au>Islam, Mohammad Moydul</au><au>Zhu, Chao</au><au>Yang, Zhigang</au><au>Zhang, Xiaosong</au><au>Olson, Adam L</au><au>Ullah, Md Zakir</au><au>Chong, Hui Chin</au><au>Tran, Tien Minh Quan</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Microelectronic devices with tiered decks of aligned pillars exhibiting bending and related methods</title><date>2024-12-24</date><risdate>2024</risdate><abstract>Microelectronic devices include a lower deck and an upper deck, each comprising a stack structure with a vertically alternating sequence of insulative structures and conductive structures arranged in tiers. First and second arrays of pillars extend through the stack structure of the lower and upper decks, respectively. In one or more of the first and second pillar arrays, at least some pillars exhibit a greater degree of bending away from a vertical orientation than at least some other pillars. The pillars of the first array align with the pillars of the second array along an interface between the lower and upper decks. Related methods are also disclosed.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US12178045B2 |
source | esp@cenet |
subjects | ELECTRICITY |
title | Microelectronic devices with tiered decks of aligned pillars exhibiting bending and related methods |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-05T14%3A19%3A47IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Kewley,%20David%20A&rft.date=2024-12-24&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS12178045B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |