Test systems configured to perform test mode operations for multiple memory devices

Test systems configured to perform test mode operations for multiple memory devices

A test system includes a test device configured to output a command address and a test dock for performing a test mode and to receive a comparison signal, and a memory device configured to enter the test mode, based on the command address, to set an initial value by the command address, to perform a...

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Hauptverfasser: Seo, Yong Ho, Hyun, Sang Ah, Lee, Jun Phyo, Jeong, Bong Hwa, Jung, Woo Sik
Format: Patent
Sprache:eng
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INFORMATION STORAGE
PHYSICS
STATIC STORES
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creator Seo, Yong Ho
Hyun, Sang Ah
Lee, Jun Phyo
Jeong, Bong Hwa
Jung, Woo Sik
description A test system includes a test device configured to output a command address and a test dock for performing a test mode and to receive a comparison signal, and a memory device configured to enter the test mode, based on the command address, to set an initial value by the command address, to perform a calculation operation on the initial value according to a logic level combination of the command address to generate a row address and a command address during a pre-charge operation, and to compress and compare internal data output based on the row address and the column address to output the internal data as the comparison signal to the test device.
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subjects INFORMATION STORAGE
PHYSICS
STATIC STORES
title Test systems configured to perform test mode operations for multiple memory devices
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