Gamma tap voltage generating circuits and display devices including the same
A gamma tap circuit includes: (i) a first gamma division circuit configured to generate a first gamma tap voltage by performing voltage division of an upper gamma tap voltage and a lower gamma tap voltage, in-sync with a first clock signal CK1 and a first complementary clock signal CK1b, which is 18...
Gespeichert in:
Hauptverfasser: | , , , , , , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | Shin, Hajoon Chen, Jia-Way Chang, Ying-Da Ding, Zhen-Guo Wu, Ching-Chieh Huang, Yu-Chieh Choi, Chulho Lee, Kyunlyeol Song, Yongjoo |
description | A gamma tap circuit includes: (i) a first gamma division circuit configured to generate a first gamma tap voltage by performing voltage division of an upper gamma tap voltage and a lower gamma tap voltage, in-sync with a first clock signal CK1 and a first complementary clock signal CK1b, which is 180° out-of-phase relative to CK1, (ii) a second gamma division circuit configured to generate a second gamma tap voltage by performing voltage division of the upper gamma tap voltage and the first gamma tap voltage, in-sync with a second clock signal CK2 and a second complementary clock signal CK2b, which is 180° out-of-phase relative to CK2, and (iii) a third gamma division circuit configured to generate a third gamma tap voltage by performing voltage division of the first gamma tap voltage and the lower gamma tap voltage, in response to CK2 and CK2b, which have a lower frequency relative to CK1 and CK1b. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US12159567B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US12159567B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US12159567B23</originalsourceid><addsrcrecordid>eNrjZPBxT8zNTVQoSSxQKMvPKUlMT1VIT81LLUosycxLV0jOLEouzSwpVkjMS1FIySwuyEmsVEhJLctMTi1WyMxLzilNASkryUhVKE7MTeVhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJQKNL4kODDY0MTS1NzcydjIyJUQMAnfE2Aw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Gamma tap voltage generating circuits and display devices including the same</title><source>esp@cenet</source><creator>Shin, Hajoon ; Chen, Jia-Way ; Chang, Ying-Da ; Ding, Zhen-Guo ; Wu, Ching-Chieh ; Huang, Yu-Chieh ; Choi, Chulho ; Lee, Kyunlyeol ; Song, Yongjoo</creator><creatorcontrib>Shin, Hajoon ; Chen, Jia-Way ; Chang, Ying-Da ; Ding, Zhen-Guo ; Wu, Ching-Chieh ; Huang, Yu-Chieh ; Choi, Chulho ; Lee, Kyunlyeol ; Song, Yongjoo</creatorcontrib><description>A gamma tap circuit includes: (i) a first gamma division circuit configured to generate a first gamma tap voltage by performing voltage division of an upper gamma tap voltage and a lower gamma tap voltage, in-sync with a first clock signal CK1 and a first complementary clock signal CK1b, which is 180° out-of-phase relative to CK1, (ii) a second gamma division circuit configured to generate a second gamma tap voltage by performing voltage division of the upper gamma tap voltage and the first gamma tap voltage, in-sync with a second clock signal CK2 and a second complementary clock signal CK2b, which is 180° out-of-phase relative to CK2, and (iii) a third gamma division circuit configured to generate a third gamma tap voltage by performing voltage division of the first gamma tap voltage and the lower gamma tap voltage, in response to CK2 and CK2b, which have a lower frequency relative to CK1 and CK1b.</description><language>eng</language><subject>ADVERTISING ; ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION ; CRYPTOGRAPHY ; DISPLAY ; EDUCATION ; PHYSICS ; SEALS</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20241203&DB=EPODOC&CC=US&NR=12159567B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20241203&DB=EPODOC&CC=US&NR=12159567B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Shin, Hajoon</creatorcontrib><creatorcontrib>Chen, Jia-Way</creatorcontrib><creatorcontrib>Chang, Ying-Da</creatorcontrib><creatorcontrib>Ding, Zhen-Guo</creatorcontrib><creatorcontrib>Wu, Ching-Chieh</creatorcontrib><creatorcontrib>Huang, Yu-Chieh</creatorcontrib><creatorcontrib>Choi, Chulho</creatorcontrib><creatorcontrib>Lee, Kyunlyeol</creatorcontrib><creatorcontrib>Song, Yongjoo</creatorcontrib><title>Gamma tap voltage generating circuits and display devices including the same</title><description>A gamma tap circuit includes: (i) a first gamma division circuit configured to generate a first gamma tap voltage by performing voltage division of an upper gamma tap voltage and a lower gamma tap voltage, in-sync with a first clock signal CK1 and a first complementary clock signal CK1b, which is 180° out-of-phase relative to CK1, (ii) a second gamma division circuit configured to generate a second gamma tap voltage by performing voltage division of the upper gamma tap voltage and the first gamma tap voltage, in-sync with a second clock signal CK2 and a second complementary clock signal CK2b, which is 180° out-of-phase relative to CK2, and (iii) a third gamma division circuit configured to generate a third gamma tap voltage by performing voltage division of the first gamma tap voltage and the lower gamma tap voltage, in response to CK2 and CK2b, which have a lower frequency relative to CK1 and CK1b.</description><subject>ADVERTISING</subject><subject>ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION</subject><subject>CRYPTOGRAPHY</subject><subject>DISPLAY</subject><subject>EDUCATION</subject><subject>PHYSICS</subject><subject>SEALS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPBxT8zNTVQoSSxQKMvPKUlMT1VIT81LLUosycxLV0jOLEouzSwpVkjMS1FIySwuyEmsVEhJLctMTi1WyMxLzilNASkryUhVKE7MTeVhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJQKNL4kODDY0MTS1NzcydjIyJUQMAnfE2Aw</recordid><startdate>20241203</startdate><enddate>20241203</enddate><creator>Shin, Hajoon</creator><creator>Chen, Jia-Way</creator><creator>Chang, Ying-Da</creator><creator>Ding, Zhen-Guo</creator><creator>Wu, Ching-Chieh</creator><creator>Huang, Yu-Chieh</creator><creator>Choi, Chulho</creator><creator>Lee, Kyunlyeol</creator><creator>Song, Yongjoo</creator><scope>EVB</scope></search><sort><creationdate>20241203</creationdate><title>Gamma tap voltage generating circuits and display devices including the same</title><author>Shin, Hajoon ; Chen, Jia-Way ; Chang, Ying-Da ; Ding, Zhen-Guo ; Wu, Ching-Chieh ; Huang, Yu-Chieh ; Choi, Chulho ; Lee, Kyunlyeol ; Song, Yongjoo</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US12159567B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>ADVERTISING</topic><topic>ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION</topic><topic>CRYPTOGRAPHY</topic><topic>DISPLAY</topic><topic>EDUCATION</topic><topic>PHYSICS</topic><topic>SEALS</topic><toplevel>online_resources</toplevel><creatorcontrib>Shin, Hajoon</creatorcontrib><creatorcontrib>Chen, Jia-Way</creatorcontrib><creatorcontrib>Chang, Ying-Da</creatorcontrib><creatorcontrib>Ding, Zhen-Guo</creatorcontrib><creatorcontrib>Wu, Ching-Chieh</creatorcontrib><creatorcontrib>Huang, Yu-Chieh</creatorcontrib><creatorcontrib>Choi, Chulho</creatorcontrib><creatorcontrib>Lee, Kyunlyeol</creatorcontrib><creatorcontrib>Song, Yongjoo</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Shin, Hajoon</au><au>Chen, Jia-Way</au><au>Chang, Ying-Da</au><au>Ding, Zhen-Guo</au><au>Wu, Ching-Chieh</au><au>Huang, Yu-Chieh</au><au>Choi, Chulho</au><au>Lee, Kyunlyeol</au><au>Song, Yongjoo</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Gamma tap voltage generating circuits and display devices including the same</title><date>2024-12-03</date><risdate>2024</risdate><abstract>A gamma tap circuit includes: (i) a first gamma division circuit configured to generate a first gamma tap voltage by performing voltage division of an upper gamma tap voltage and a lower gamma tap voltage, in-sync with a first clock signal CK1 and a first complementary clock signal CK1b, which is 180° out-of-phase relative to CK1, (ii) a second gamma division circuit configured to generate a second gamma tap voltage by performing voltage division of the upper gamma tap voltage and the first gamma tap voltage, in-sync with a second clock signal CK2 and a second complementary clock signal CK2b, which is 180° out-of-phase relative to CK2, and (iii) a third gamma division circuit configured to generate a third gamma tap voltage by performing voltage division of the first gamma tap voltage and the lower gamma tap voltage, in response to CK2 and CK2b, which have a lower frequency relative to CK1 and CK1b.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US12159567B2 |
source | esp@cenet |
subjects | ADVERTISING ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION CRYPTOGRAPHY DISPLAY EDUCATION PHYSICS SEALS |
title | Gamma tap voltage generating circuits and display devices including the same |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-22T22%3A57%3A48IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Shin,%20Hajoon&rft.date=2024-12-03&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS12159567B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |