Highly optimized network-on-chip design at large scale

There may be provided a method for traffic control in a network on chip (NOC), the method may include receiving, by input interface units of the NOC, flow control units destined to output interface units of the NOC; wherein multiple routing paths span between the input interface units and the output...

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Hauptverfasser:	Koren, Guy, Moran, Gil, Malach, Gal
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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creator	Koren, Guy Moran, Gil Malach, Gal
description	There may be provided a method for traffic control in a network on chip (NOC), the method may include receiving, by input interface units of the NOC, flow control units destined to output interface units of the NOC; wherein multiple routing paths span between the input interface units and the output interface units; wherein at least some of the routing paths are formed by multiple routers of a grid of routers of the NOC and have a single turning point; allocating virtual channels to the flow control units, wherein an allocating of a virtual channel to a flow control unit (FCU) is based on a type of a transaction associated with the FCU and on a location of the single turning point; and routing the flow control units, based on the virtual channels allocated to the FCUs, between the input interface units and the output interface units.
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subjects	CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
title	Highly optimized network-on-chip design at large scale
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