Packet storage based on packet properties
In an example, a system includes a network port that receives a packet; a first memory; a second memory; and a packet analyzer coupled to the network port. The packet analyzer operates to divide the packet into multiple fragments, analyze each of the multiple fragments to determine whether the corre...
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | Mody, Mihir Narendra Govindarajan, Sriramakrishnan |
description | In an example, a system includes a network port that receives a packet; a first memory; a second memory; and a packet analyzer coupled to the network port. The packet analyzer operates to divide the packet into multiple fragments, analyze each of the multiple fragments to determine whether the corresponding fragment has a first priority level or a second, lower, priority level, determine whether to store each of the multiple fragments in the first memory or the second memory based on the priority level determined for that fragment, store each fragment determined to have the first priority level in the first memory, and store each fragment determined to have the second priority level in the second memory. The network port, packet analyzer and the first memory, which may be a cache memory, may be embodied on a chip, and the second memory may be external to the chip. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US12126549B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US12126549B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US12126549B23</originalsourceid><addsrcrecordid>eNrjZNAMSEzOTi1RKC7JL0pMT1VISixOTVHIz1MogIgXFOUXpBaVZKYW8zCwpiXmFKfyQmluBkU31xBnD93Ugvz41GKg-tS81JL40GBDI0MjM1MTSycjY2LUAAD77yjO</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Packet storage based on packet properties</title><source>esp@cenet</source><creator>Mody, Mihir Narendra ; Govindarajan, Sriramakrishnan</creator><creatorcontrib>Mody, Mihir Narendra ; Govindarajan, Sriramakrishnan</creatorcontrib><description>In an example, a system includes a network port that receives a packet; a first memory; a second memory; and a packet analyzer coupled to the network port. The packet analyzer operates to divide the packet into multiple fragments, analyze each of the multiple fragments to determine whether the corresponding fragment has a first priority level or a second, lower, priority level, determine whether to store each of the multiple fragments in the first memory or the second memory based on the priority level determined for that fragment, store each fragment determined to have the first priority level in the first memory, and store each fragment determined to have the second priority level in the second memory. The network port, packet analyzer and the first memory, which may be a cache memory, may be embodied on a chip, and the second memory may be external to the chip.</description><language>eng</language><subject>ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRICITY ; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20241022&DB=EPODOC&CC=US&NR=12126549B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20241022&DB=EPODOC&CC=US&NR=12126549B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Mody, Mihir Narendra</creatorcontrib><creatorcontrib>Govindarajan, Sriramakrishnan</creatorcontrib><title>Packet storage based on packet properties</title><description>In an example, a system includes a network port that receives a packet; a first memory; a second memory; and a packet analyzer coupled to the network port. The packet analyzer operates to divide the packet into multiple fragments, analyze each of the multiple fragments to determine whether the corresponding fragment has a first priority level or a second, lower, priority level, determine whether to store each of the multiple fragments in the first memory or the second memory based on the priority level determined for that fragment, store each fragment determined to have the first priority level in the first memory, and store each fragment determined to have the second priority level in the second memory. The network port, packet analyzer and the first memory, which may be a cache memory, may be embodied on a chip, and the second memory may be external to the chip.</description><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRICITY</subject><subject>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNAMSEzOTi1RKC7JL0pMT1VISixOTVHIz1MogIgXFOUXpBaVZKYW8zCwpiXmFKfyQmluBkU31xBnD93Ugvz41GKg-tS81JL40GBDI0MjM1MTSycjY2LUAAD77yjO</recordid><startdate>20241022</startdate><enddate>20241022</enddate><creator>Mody, Mihir Narendra</creator><creator>Govindarajan, Sriramakrishnan</creator><scope>EVB</scope></search><sort><creationdate>20241022</creationdate><title>Packet storage based on packet properties</title><author>Mody, Mihir Narendra ; Govindarajan, Sriramakrishnan</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US12126549B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRICITY</topic><topic>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</topic><toplevel>online_resources</toplevel><creatorcontrib>Mody, Mihir Narendra</creatorcontrib><creatorcontrib>Govindarajan, Sriramakrishnan</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Mody, Mihir Narendra</au><au>Govindarajan, Sriramakrishnan</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Packet storage based on packet properties</title><date>2024-10-22</date><risdate>2024</risdate><abstract>In an example, a system includes a network port that receives a packet; a first memory; a second memory; and a packet analyzer coupled to the network port. The packet analyzer operates to divide the packet into multiple fragments, analyze each of the multiple fragments to determine whether the corresponding fragment has a first priority level or a second, lower, priority level, determine whether to store each of the multiple fragments in the first memory or the second memory based on the priority level determined for that fragment, store each fragment determined to have the first priority level in the first memory, and store each fragment determined to have the second priority level in the second memory. The network port, packet analyzer and the first memory, which may be a cache memory, may be embodied on a chip, and the second memory may be external to the chip.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US12126549B2 |
source | esp@cenet |
subjects | ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION |
title | Packet storage based on packet properties |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-03T10%3A32%3A12IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Mody,%20Mihir%20Narendra&rft.date=2024-10-22&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS12126549B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |