Technique to enable simultaneous use of on-die SRAM as cache and memory

Technique to enable simultaneous use of on-die SRAM as cache and memory

A technique for operating a cache is disclosed. The technique includes utilizing a first portion of a cache in a directly accessed manner; and utilizing a second portion of the cache as a cache.

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Hauptverfasser: Tsien, Benjamin, Patel, Chintan S, Kalyanasundharam, Vydhyanathan, Branover, Alexander J
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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creator Tsien, Benjamin
Patel, Chintan S
Kalyanasundharam, Vydhyanathan
Branover, Alexander J
description A technique for operating a cache is disclosed. The technique includes utilizing a first portion of a cache in a directly accessed manner; and utilizing a second portion of the cache as a cache.
format Patent
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Technique to enable simultaneous use of on-die SRAM as cache and memory
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