Vertical transistor fabrication for memory applications

Embodiments of the present disclosure provide an apparatus and methods for forming stair-like structures with accurate profiles and dimension control for manufacturing three dimensional (3D) stacked memory cell semiconductor devices. In one embodiment, a memory cell device includes a film stack comp...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Kwon, Thomas, Ahn, Jaesoo, Pakala, Mahendra
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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