Bias voltage generation circuit for memory devices

Bias voltage generation circuit for memory devices

The present disclosure relates to memory devices and, more particularly, to bias voltage generation circuit for memory devices and methods of operation. The voltage generation circuit includes: an internal voltage generator which providing a bias voltage to at least one internal node of a bias volta...

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Hauptverfasser: Gaul, Nishtha, Nemawarkar, Shashank, Paul, Bipul C, Yin, Ming
Format: Patent
Sprache:eng
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INFORMATION STORAGE
PHYSICS
STATIC STORES
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creator Gaul, Nishtha
Nemawarkar, Shashank
Paul, Bipul C
Yin, Ming
description The present disclosure relates to memory devices and, more particularly, to bias voltage generation circuit for memory devices and methods of operation. The voltage generation circuit includes: an internal voltage generator which providing a bias voltage to at least one internal node of a bias voltage generation circuitry; and at least one pre-charging circuitry providing a predefined bias voltage to at least one internal node including a distributed network of local drivers.
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PHYSICS
STATIC STORES
title Bias voltage generation circuit for memory devices
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