Selective deposition of metal barrier in damascene processes

A method of forming an integrated circuit structure includes forming an etch stop layer over a conductive feature, forming a dielectric layer over the etch stop layer, forming an opening in the dielectric layer to reveal the etch stop layer, and etching the etch stop layer through the opening using...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Lee, Ya-Lien, Shen, Chieh-Yi, Kuo, Chia-Pang
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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