Semiconductor device including a semiconductor die and a plurality of antenna patterns
A package structure includes a semiconductor die, an insulating encapsulant, a first redistribution layer, a second redistribution layer, a heat dissipation element and conductive balls. The insulating encapsulant is encapsulating the semiconductor die, and has a first surface and a second surface o...
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| creator | Hsu, Sen-Kuei Pan, Hsin-Yu Chiang, Yi-Che |
| description | A package structure includes a semiconductor die, an insulating encapsulant, a first redistribution layer, a second redistribution layer, a heat dissipation element and conductive balls. The insulating encapsulant is encapsulating the semiconductor die, and has a first surface and a second surface opposite to the first surface. The first redistribution layer is located on the first surface of the insulating encapsulant and includes at least one feed line and one ground plate. The second redistribution layer is located on the second surface of the insulating encapsulant and electrically connected to the semiconductor die and the first redistribution layer. The heat dissipation element is disposed on the first redistribution layer and includes a conductive base and antenna patterns, wherein the antenna patterns is electrically connected to the feed line and is electrically coupled to the ground plate of the first redistribution layer. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US12021024B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US12021024B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US12021024B23</originalsourceid><addsrcrecordid>eNqNyjEKAjEQQNE0FqLeYTyAsBs9gaLYr9ouQzIrA9lJSCaCtzeFjZ3Vh8dfmsdAM7sovjqNGTy92BGwuFA9yxMQyu_ABCi-eQo1Y2B9Q5waKYk0RFXKUtZmMWEotPl2ZbaX8-103VGKI5WEjoR0vA-97Wzf2cPR7v95Pk7oOew</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor device including a semiconductor die and a plurality of antenna patterns</title><source>esp@cenet</source><creator>Hsu, Sen-Kuei ; Pan, Hsin-Yu ; Chiang, Yi-Che</creator><creatorcontrib>Hsu, Sen-Kuei ; Pan, Hsin-Yu ; Chiang, Yi-Che</creatorcontrib><description>A package structure includes a semiconductor die, an insulating encapsulant, a first redistribution layer, a second redistribution layer, a heat dissipation element and conductive balls. The insulating encapsulant is encapsulating the semiconductor die, and has a first surface and a second surface opposite to the first surface. The first redistribution layer is located on the first surface of the insulating encapsulant and includes at least one feed line and one ground plate. The second redistribution layer is located on the second surface of the insulating encapsulant and electrically connected to the semiconductor die and the first redistribution layer. The heat dissipation element is disposed on the first redistribution layer and includes a conductive base and antenna patterns, wherein the antenna patterns is electrically connected to the feed line and is electrically coupled to the ground plate of the first redistribution layer.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240625&DB=EPODOC&CC=US&NR=12021024B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25562,76317</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240625&DB=EPODOC&CC=US&NR=12021024B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Hsu, Sen-Kuei</creatorcontrib><creatorcontrib>Pan, Hsin-Yu</creatorcontrib><creatorcontrib>Chiang, Yi-Che</creatorcontrib><title>Semiconductor device including a semiconductor die and a plurality of antenna patterns</title><description>A package structure includes a semiconductor die, an insulating encapsulant, a first redistribution layer, a second redistribution layer, a heat dissipation element and conductive balls. The insulating encapsulant is encapsulating the semiconductor die, and has a first surface and a second surface opposite to the first surface. The first redistribution layer is located on the first surface of the insulating encapsulant and includes at least one feed line and one ground plate. The second redistribution layer is located on the second surface of the insulating encapsulant and electrically connected to the semiconductor die and the first redistribution layer. The heat dissipation element is disposed on the first redistribution layer and includes a conductive base and antenna patterns, wherein the antenna patterns is electrically connected to the feed line and is electrically coupled to the ground plate of the first redistribution layer.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyjEKAjEQQNE0FqLeYTyAsBs9gaLYr9ouQzIrA9lJSCaCtzeFjZ3Vh8dfmsdAM7sovjqNGTy92BGwuFA9yxMQyu_ABCi-eQo1Y2B9Q5waKYk0RFXKUtZmMWEotPl2ZbaX8-103VGKI5WEjoR0vA-97Wzf2cPR7v95Pk7oOew</recordid><startdate>20240625</startdate><enddate>20240625</enddate><creator>Hsu, Sen-Kuei</creator><creator>Pan, Hsin-Yu</creator><creator>Chiang, Yi-Che</creator><scope>EVB</scope></search><sort><creationdate>20240625</creationdate><title>Semiconductor device including a semiconductor die and a plurality of antenna patterns</title><author>Hsu, Sen-Kuei ; Pan, Hsin-Yu ; Chiang, Yi-Che</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US12021024B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Hsu, Sen-Kuei</creatorcontrib><creatorcontrib>Pan, Hsin-Yu</creatorcontrib><creatorcontrib>Chiang, Yi-Che</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Hsu, Sen-Kuei</au><au>Pan, Hsin-Yu</au><au>Chiang, Yi-Che</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device including a semiconductor die and a plurality of antenna patterns</title><date>2024-06-25</date><risdate>2024</risdate><abstract>A package structure includes a semiconductor die, an insulating encapsulant, a first redistribution layer, a second redistribution layer, a heat dissipation element and conductive balls. The insulating encapsulant is encapsulating the semiconductor die, and has a first surface and a second surface opposite to the first surface. The first redistribution layer is located on the first surface of the insulating encapsulant and includes at least one feed line and one ground plate. The second redistribution layer is located on the second surface of the insulating encapsulant and electrically connected to the semiconductor die and the first redistribution layer. The heat dissipation element is disposed on the first redistribution layer and includes a conductive base and antenna patterns, wherein the antenna patterns is electrically connected to the feed line and is electrically coupled to the ground plate of the first redistribution layer.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | Semiconductor device including a semiconductor die and a plurality of antenna patterns |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-09T19%3A57%3A00IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Hsu,%20Sen-Kuei&rft.date=2024-06-25&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS12021024B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |