Memory devices and methods of forming memory devices

Memory devices and methods of forming memory devices

A memory device may be provided, including a first electrode, an insulating element arranged over the first electrode, a second electrode arranged over the insulating element, a switching layer and a conductive line electrically coupled to the second electrode. Each of the first electrode, the insul...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Toh, Eng Huat, Tan, Shyue Seng, Loy, Desmond Jia Jun
Format: Patent
Sprache:eng
Schlagworte:
ELECTRICITY
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Toh, Eng Huat
Tan, Shyue Seng
Loy, Desmond Jia Jun
description A memory device may be provided, including a first electrode, an insulating element arranged over the first electrode, a second electrode arranged over the insulating element, a switching layer and a conductive line electrically coupled to the second electrode. Each of the first electrode, the insulating element, and the second electrode may include a first side surface and a second side surface. Centers of the first electrode, the insulating element, and the second electrode may be substantially vertically aligned. The first side surface and the second side surface of the second electrode may be substantially vertically aligned with the first side surface and the second side surface of at least one of the insulating element and the first electrode. The switching layer may be conformal to the first side surfaces and the second side surfaces of the second electrode and the insulating element.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11991938B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11991938B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11991938B23</originalsourceid><addsrcrecordid>eNrjZDDxTc3NL6pUSEkty0xOLVZIzEtRyE0tychPKVbIT1NIyy_KzcxLBwohq-JhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfGhwYaGlpaGlsYWTkbGxKgBADLgLQc</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Memory devices and methods of forming memory devices</title><source>esp@cenet</source><creator>Toh, Eng Huat ; Tan, Shyue Seng ; Loy, Desmond Jia Jun</creator><creatorcontrib>Toh, Eng Huat ; Tan, Shyue Seng ; Loy, Desmond Jia Jun</creatorcontrib><description>A memory device may be provided, including a first electrode, an insulating element arranged over the first electrode, a second electrode arranged over the insulating element, a switching layer and a conductive line electrically coupled to the second electrode. Each of the first electrode, the insulating element, and the second electrode may include a first side surface and a second side surface. Centers of the first electrode, the insulating element, and the second electrode may be substantially vertically aligned. The first side surface and the second side surface of the second electrode may be substantially vertically aligned with the first side surface and the second side surface of at least one of the insulating element and the first electrode. The switching layer may be conformal to the first side surfaces and the second side surfaces of the second electrode and the insulating element.</description><language>eng</language><subject>ELECTRICITY</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240521&amp;DB=EPODOC&amp;CC=US&amp;NR=11991938B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240521&amp;DB=EPODOC&amp;CC=US&amp;NR=11991938B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Toh, Eng Huat</creatorcontrib><creatorcontrib>Tan, Shyue Seng</creatorcontrib><creatorcontrib>Loy, Desmond Jia Jun</creatorcontrib><title>Memory devices and methods of forming memory devices</title><description>A memory device may be provided, including a first electrode, an insulating element arranged over the first electrode, a second electrode arranged over the insulating element, a switching layer and a conductive line electrically coupled to the second electrode. Each of the first electrode, the insulating element, and the second electrode may include a first side surface and a second side surface. Centers of the first electrode, the insulating element, and the second electrode may be substantially vertically aligned. The first side surface and the second side surface of the second electrode may be substantially vertically aligned with the first side surface and the second side surface of at least one of the insulating element and the first electrode. The switching layer may be conformal to the first side surfaces and the second side surfaces of the second electrode and the insulating element.</description><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDDxTc3NL6pUSEkty0xOLVZIzEtRyE0tychPKVbIT1NIyy_KzcxLBwohq-JhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfGhwYaGlpaGlsYWTkbGxKgBADLgLQc</recordid><startdate>20240521</startdate><enddate>20240521</enddate><creator>Toh, Eng Huat</creator><creator>Tan, Shyue Seng</creator><creator>Loy, Desmond Jia Jun</creator><scope>EVB</scope></search><sort><creationdate>20240521</creationdate><title>Memory devices and methods of forming memory devices</title><author>Toh, Eng Huat ; Tan, Shyue Seng ; Loy, Desmond Jia Jun</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11991938B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>Toh, Eng Huat</creatorcontrib><creatorcontrib>Tan, Shyue Seng</creatorcontrib><creatorcontrib>Loy, Desmond Jia Jun</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Toh, Eng Huat</au><au>Tan, Shyue Seng</au><au>Loy, Desmond Jia Jun</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Memory devices and methods of forming memory devices</title><date>2024-05-21</date><risdate>2024</risdate><abstract>A memory device may be provided, including a first electrode, an insulating element arranged over the first electrode, a second electrode arranged over the insulating element, a switching layer and a conductive line electrically coupled to the second electrode. Each of the first electrode, the insulating element, and the second electrode may include a first side surface and a second side surface. Centers of the first electrode, the insulating element, and the second electrode may be substantially vertically aligned. The first side surface and the second side surface of the second electrode may be substantially vertically aligned with the first side surface and the second side surface of at least one of the insulating element and the first electrode. The switching layer may be conformal to the first side surfaces and the second side surfaces of the second electrode and the insulating element.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US11991938B2
source esp@cenet
subjects ELECTRICITY
title Memory devices and methods of forming memory devices
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-19T19%3A04%3A04IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Toh,%20Eng%20Huat&rft.date=2024-05-21&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS11991938B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true