Parametrically activated quantum logic gates
In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubi...
Gespeichert in:
Hauptverfasser: | , , , , , , , , , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | Didier, Nicolas da Silva, Marcus Palmer Tezak, Nikolas Anton Ryan, Colm Andrew Reagor, Matthew J Sete, Eyob A Sivarajah, Prasahnt Papageorge, Alexander Hong, Sabrina Sae Byul Abrams, Deanna Margo Rigetti, Chad Tyler Caldwell, Shane Arthur |
description | In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11990905B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11990905B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11990905B13</originalsourceid><addsrcrecordid>eNrjZNAJSCxKzE0tKcpMTszJqVRITC7JLEssSU1RKCxNzCspzVXIyU_PTFZIB4oV8zCwpiXmFKfyQmluBkU31xBnD93Ugvz41OKCxOTUvNSS-NBgQ0NLSwNLA1MnQ2Ni1AAAy_oqZQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Parametrically activated quantum logic gates</title><source>esp@cenet</source><creator>Didier, Nicolas ; da Silva, Marcus Palmer ; Tezak, Nikolas Anton ; Ryan, Colm Andrew ; Reagor, Matthew J ; Sete, Eyob A ; Sivarajah, Prasahnt ; Papageorge, Alexander ; Hong, Sabrina Sae Byul ; Abrams, Deanna Margo ; Rigetti, Chad Tyler ; Caldwell, Shane Arthur</creator><creatorcontrib>Didier, Nicolas ; da Silva, Marcus Palmer ; Tezak, Nikolas Anton ; Ryan, Colm Andrew ; Reagor, Matthew J ; Sete, Eyob A ; Sivarajah, Prasahnt ; Papageorge, Alexander ; Hong, Sabrina Sae Byul ; Abrams, Deanna Margo ; Rigetti, Chad Tyler ; Caldwell, Shane Arthur</creatorcontrib><description>In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device.</description><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; CALCULATING ; COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS ; COMPUTING ; COUNTING ; ELECTRICITY ; PHYSICS ; PULSE TECHNIQUE</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240521&DB=EPODOC&CC=US&NR=11990905B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76516</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240521&DB=EPODOC&CC=US&NR=11990905B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Didier, Nicolas</creatorcontrib><creatorcontrib>da Silva, Marcus Palmer</creatorcontrib><creatorcontrib>Tezak, Nikolas Anton</creatorcontrib><creatorcontrib>Ryan, Colm Andrew</creatorcontrib><creatorcontrib>Reagor, Matthew J</creatorcontrib><creatorcontrib>Sete, Eyob A</creatorcontrib><creatorcontrib>Sivarajah, Prasahnt</creatorcontrib><creatorcontrib>Papageorge, Alexander</creatorcontrib><creatorcontrib>Hong, Sabrina Sae Byul</creatorcontrib><creatorcontrib>Abrams, Deanna Margo</creatorcontrib><creatorcontrib>Rigetti, Chad Tyler</creatorcontrib><creatorcontrib>Caldwell, Shane Arthur</creatorcontrib><title>Parametrically activated quantum logic gates</title><description>In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CALCULATING</subject><subject>COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRICITY</subject><subject>PHYSICS</subject><subject>PULSE TECHNIQUE</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNAJSCxKzE0tKcpMTszJqVRITC7JLEssSU1RKCxNzCspzVXIyU_PTFZIB4oV8zCwpiXmFKfyQmluBkU31xBnD93Ugvz41OKCxOTUvNSS-NBgQ0NLSwNLA1MnQ2Ni1AAAy_oqZQ</recordid><startdate>20240521</startdate><enddate>20240521</enddate><creator>Didier, Nicolas</creator><creator>da Silva, Marcus Palmer</creator><creator>Tezak, Nikolas Anton</creator><creator>Ryan, Colm Andrew</creator><creator>Reagor, Matthew J</creator><creator>Sete, Eyob A</creator><creator>Sivarajah, Prasahnt</creator><creator>Papageorge, Alexander</creator><creator>Hong, Sabrina Sae Byul</creator><creator>Abrams, Deanna Margo</creator><creator>Rigetti, Chad Tyler</creator><creator>Caldwell, Shane Arthur</creator><scope>EVB</scope></search><sort><creationdate>20240521</creationdate><title>Parametrically activated quantum logic gates</title><author>Didier, Nicolas ; da Silva, Marcus Palmer ; Tezak, Nikolas Anton ; Ryan, Colm Andrew ; Reagor, Matthew J ; Sete, Eyob A ; Sivarajah, Prasahnt ; Papageorge, Alexander ; Hong, Sabrina Sae Byul ; Abrams, Deanna Margo ; Rigetti, Chad Tyler ; Caldwell, Shane Arthur</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11990905B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CALCULATING</topic><topic>COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRICITY</topic><topic>PHYSICS</topic><topic>PULSE TECHNIQUE</topic><toplevel>online_resources</toplevel><creatorcontrib>Didier, Nicolas</creatorcontrib><creatorcontrib>da Silva, Marcus Palmer</creatorcontrib><creatorcontrib>Tezak, Nikolas Anton</creatorcontrib><creatorcontrib>Ryan, Colm Andrew</creatorcontrib><creatorcontrib>Reagor, Matthew J</creatorcontrib><creatorcontrib>Sete, Eyob A</creatorcontrib><creatorcontrib>Sivarajah, Prasahnt</creatorcontrib><creatorcontrib>Papageorge, Alexander</creatorcontrib><creatorcontrib>Hong, Sabrina Sae Byul</creatorcontrib><creatorcontrib>Abrams, Deanna Margo</creatorcontrib><creatorcontrib>Rigetti, Chad Tyler</creatorcontrib><creatorcontrib>Caldwell, Shane Arthur</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Didier, Nicolas</au><au>da Silva, Marcus Palmer</au><au>Tezak, Nikolas Anton</au><au>Ryan, Colm Andrew</au><au>Reagor, Matthew J</au><au>Sete, Eyob A</au><au>Sivarajah, Prasahnt</au><au>Papageorge, Alexander</au><au>Hong, Sabrina Sae Byul</au><au>Abrams, Deanna Margo</au><au>Rigetti, Chad Tyler</au><au>Caldwell, Shane Arthur</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Parametrically activated quantum logic gates</title><date>2024-05-21</date><risdate>2024</risdate><abstract>In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US11990905B1 |
source | esp@cenet |
subjects | BASIC ELECTRONIC CIRCUITRY CALCULATING COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS COMPUTING COUNTING ELECTRICITY PHYSICS PULSE TECHNIQUE |
title | Parametrically activated quantum logic gates |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-21T20%3A09%3A34IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Didier,%20Nicolas&rft.date=2024-05-21&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS11990905B1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |