Method for fabricating transistor with thinned channel

A method of fabricating a MOS transistor having a thinned channel region is described. The channel region is etched following removal of a dummy gate. The source and drain regions have relatively low resistance with the process.

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Bibliographische Detailangaben
Hauptverfasser:	Doczy, Mark L, Doyle, Brian S, Majumdar, Amlan, Datta, Suman, Radosavljevic, Marko, Metz, Matthew V, Chau, Robert S, Kavalieros, Jack T, Brask, Justin K
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES TRANSMISSION
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Beschreibung
Zusammenfassung:	A method of fabricating a MOS transistor having a thinned channel region is described. The channel region is etched following removal of a dummy gate. The source and drain regions have relatively low resistance with the process.