Data relocation for inline metadata
Technologies disclosed herein provide one example of a system that includes processor circuitry to be communicatively coupled to a memory circuitry. The processor circuitry is to receive a memory access request corresponding to an application for access to an address range in a memory allocation of...
Gespeichert in:
| Hauptverfasser: | , , , , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | Durham, David M Subramoney, Sreenivas LeMay, Michael D Rakshit, Joydeep Nori, Anant Vithal Gaur, Jayesh Deutsch, Sergej |
| description | Technologies disclosed herein provide one example of a system that includes processor circuitry to be communicatively coupled to a memory circuitry. The processor circuitry is to receive a memory access request corresponding to an application for access to an address range in a memory allocation of the memory circuitry and to locate a metadata region within the memory allocation. The processor circuitry is also to, in response to a determination that the address range includes at least a portion of the metadata region, obtain first metadata stored in the metadata region, use the first metadata to determine an alternate memory address in a relocation region, and read, at the alternate memory address, displaced data from the portion of the metadata region included in the address range of the memory allocation. The address range includes one or more bytes of an expected allocation region of the memory allocation. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11972126B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11972126B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11972126B23</originalsourceid><addsrcrecordid>eNrjZFB2SSxJVChKzclPTizJzM9TSMsvUsjMy8nMS1XITS1JTAFK8zCwpiXmFKfyQmluBkU31xBnD93Ugvz41OKCxOTUvNSS-NBgQ0NLcyNDIzMnI2Ni1AAA0kQmaQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Data relocation for inline metadata</title><source>esp@cenet</source><creator>Durham, David M ; Subramoney, Sreenivas ; LeMay, Michael D ; Rakshit, Joydeep ; Nori, Anant Vithal ; Gaur, Jayesh ; Deutsch, Sergej</creator><creatorcontrib>Durham, David M ; Subramoney, Sreenivas ; LeMay, Michael D ; Rakshit, Joydeep ; Nori, Anant Vithal ; Gaur, Jayesh ; Deutsch, Sergej</creatorcontrib><description>Technologies disclosed herein provide one example of a system that includes processor circuitry to be communicatively coupled to a memory circuitry. The processor circuitry is to receive a memory access request corresponding to an application for access to an address range in a memory allocation of the memory circuitry and to locate a metadata region within the memory allocation. The processor circuitry is also to, in response to a determination that the address range includes at least a portion of the metadata region, obtain first metadata stored in the metadata region, use the first metadata to determine an alternate memory address in a relocation region, and read, at the alternate memory address, displaced data from the portion of the metadata region included in the address range of the memory allocation. The address range includes one or more bytes of an expected allocation region of the memory allocation.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240430&DB=EPODOC&CC=US&NR=11972126B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240430&DB=EPODOC&CC=US&NR=11972126B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Durham, David M</creatorcontrib><creatorcontrib>Subramoney, Sreenivas</creatorcontrib><creatorcontrib>LeMay, Michael D</creatorcontrib><creatorcontrib>Rakshit, Joydeep</creatorcontrib><creatorcontrib>Nori, Anant Vithal</creatorcontrib><creatorcontrib>Gaur, Jayesh</creatorcontrib><creatorcontrib>Deutsch, Sergej</creatorcontrib><title>Data relocation for inline metadata</title><description>Technologies disclosed herein provide one example of a system that includes processor circuitry to be communicatively coupled to a memory circuitry. The processor circuitry is to receive a memory access request corresponding to an application for access to an address range in a memory allocation of the memory circuitry and to locate a metadata region within the memory allocation. The processor circuitry is also to, in response to a determination that the address range includes at least a portion of the metadata region, obtain first metadata stored in the metadata region, use the first metadata to determine an alternate memory address in a relocation region, and read, at the alternate memory address, displaced data from the portion of the metadata region included in the address range of the memory allocation. The address range includes one or more bytes of an expected allocation region of the memory allocation.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFB2SSxJVChKzclPTizJzM9TSMsvUsjMy8nMS1XITS1JTAFK8zCwpiXmFKfyQmluBkU31xBnD93Ugvz41OKCxOTUvNSS-NBgQ0NLcyNDIzMnI2Ni1AAA0kQmaQ</recordid><startdate>20240430</startdate><enddate>20240430</enddate><creator>Durham, David M</creator><creator>Subramoney, Sreenivas</creator><creator>LeMay, Michael D</creator><creator>Rakshit, Joydeep</creator><creator>Nori, Anant Vithal</creator><creator>Gaur, Jayesh</creator><creator>Deutsch, Sergej</creator><scope>EVB</scope></search><sort><creationdate>20240430</creationdate><title>Data relocation for inline metadata</title><author>Durham, David M ; Subramoney, Sreenivas ; LeMay, Michael D ; Rakshit, Joydeep ; Nori, Anant Vithal ; Gaur, Jayesh ; Deutsch, Sergej</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11972126B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>Durham, David M</creatorcontrib><creatorcontrib>Subramoney, Sreenivas</creatorcontrib><creatorcontrib>LeMay, Michael D</creatorcontrib><creatorcontrib>Rakshit, Joydeep</creatorcontrib><creatorcontrib>Nori, Anant Vithal</creatorcontrib><creatorcontrib>Gaur, Jayesh</creatorcontrib><creatorcontrib>Deutsch, Sergej</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Durham, David M</au><au>Subramoney, Sreenivas</au><au>LeMay, Michael D</au><au>Rakshit, Joydeep</au><au>Nori, Anant Vithal</au><au>Gaur, Jayesh</au><au>Deutsch, Sergej</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Data relocation for inline metadata</title><date>2024-04-30</date><risdate>2024</risdate><abstract>Technologies disclosed herein provide one example of a system that includes processor circuitry to be communicatively coupled to a memory circuitry. The processor circuitry is to receive a memory access request corresponding to an application for access to an address range in a memory allocation of the memory circuitry and to locate a metadata region within the memory allocation. The processor circuitry is also to, in response to a determination that the address range includes at least a portion of the metadata region, obtain first metadata stored in the metadata region, use the first metadata to determine an alternate memory address in a relocation region, and read, at the alternate memory address, displaced data from the portion of the metadata region included in the address range of the memory allocation. The address range includes one or more bytes of an expected allocation region of the memory allocation.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US11972126B2 |
| source | esp@cenet |
| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | Data relocation for inline metadata |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-12T19%3A59%3A43IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Durham,%20David%20M&rft.date=2024-04-30&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS11972126B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |