Semiconductor device and manufacturing method thereof

A semiconductor device includes a semiconductor substrate having a first region and a second region, insulators, gate stacks, and first and second S/Ds. The first and second regions respectively includes at least one first semiconductor fin and at least one second semiconductor fin. A width of a mid...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Wu, Kai-Di, Chen, Kuan-Jung, Chen, I-Chih, Lee, Ming-Feng, Huang, Chih-Mu, Kuan, Ting-Chun
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Wu, Kai-Di
Chen, Kuan-Jung
Chen, I-Chih
Lee, Ming-Feng
Huang, Chih-Mu
Kuan, Ting-Chun
description A semiconductor device includes a semiconductor substrate having a first region and a second region, insulators, gate stacks, and first and second S/Ds. The first and second regions respectively includes at least one first semiconductor fin and at least one second semiconductor fin. A width of a middle portion of the first semiconductor fin is equal to widths of end portions of the first semiconductor fin. A width of a middle portion of the second semiconductor fin is smaller than widths of end portions of the second semiconductor fin. The insulators are disposed on the semiconductor substrate. The first and second semiconductor fins are sandwiched by the insulators. The gate stacks are over a portion of the first semiconductor fin and a portion of the second semiconductor fin. The first and second S/Ds respectively covers another portion of the first semiconductor fin and another portion of the second semiconductor fin.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11955484B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11955484B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11955484B23</originalsourceid><addsrcrecordid>eNrjZDANTs3NTM7PSylNLskvUkhJLctMTlVIzEtRyE3MK01LTC4pLcrMS1fITS3JyE9RKMlILUrNT-NhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfGhwYaGlqamJhYmTkbGxKgBAKTULd4</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor device and manufacturing method thereof</title><source>esp@cenet</source><creator>Wu, Kai-Di ; Chen, Kuan-Jung ; Chen, I-Chih ; Lee, Ming-Feng ; Huang, Chih-Mu ; Kuan, Ting-Chun</creator><creatorcontrib>Wu, Kai-Di ; Chen, Kuan-Jung ; Chen, I-Chih ; Lee, Ming-Feng ; Huang, Chih-Mu ; Kuan, Ting-Chun</creatorcontrib><description>A semiconductor device includes a semiconductor substrate having a first region and a second region, insulators, gate stacks, and first and second S/Ds. The first and second regions respectively includes at least one first semiconductor fin and at least one second semiconductor fin. A width of a middle portion of the first semiconductor fin is equal to widths of end portions of the first semiconductor fin. A width of a middle portion of the second semiconductor fin is smaller than widths of end portions of the second semiconductor fin. The insulators are disposed on the semiconductor substrate. The first and second semiconductor fins are sandwiched by the insulators. The gate stacks are over a portion of the first semiconductor fin and a portion of the second semiconductor fin. The first and second S/Ds respectively covers another portion of the first semiconductor fin and another portion of the second semiconductor fin.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240409&amp;DB=EPODOC&amp;CC=US&amp;NR=11955484B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240409&amp;DB=EPODOC&amp;CC=US&amp;NR=11955484B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Wu, Kai-Di</creatorcontrib><creatorcontrib>Chen, Kuan-Jung</creatorcontrib><creatorcontrib>Chen, I-Chih</creatorcontrib><creatorcontrib>Lee, Ming-Feng</creatorcontrib><creatorcontrib>Huang, Chih-Mu</creatorcontrib><creatorcontrib>Kuan, Ting-Chun</creatorcontrib><title>Semiconductor device and manufacturing method thereof</title><description>A semiconductor device includes a semiconductor substrate having a first region and a second region, insulators, gate stacks, and first and second S/Ds. The first and second regions respectively includes at least one first semiconductor fin and at least one second semiconductor fin. A width of a middle portion of the first semiconductor fin is equal to widths of end portions of the first semiconductor fin. A width of a middle portion of the second semiconductor fin is smaller than widths of end portions of the second semiconductor fin. The insulators are disposed on the semiconductor substrate. The first and second semiconductor fins are sandwiched by the insulators. The gate stacks are over a portion of the first semiconductor fin and a portion of the second semiconductor fin. The first and second S/Ds respectively covers another portion of the first semiconductor fin and another portion of the second semiconductor fin.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDANTs3NTM7PSylNLskvUkhJLctMTlVIzEtRyE3MK01LTC4pLcrMS1fITS3JyE9RKMlILUrNT-NhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfGhwYaGlqamJhYmTkbGxKgBAKTULd4</recordid><startdate>20240409</startdate><enddate>20240409</enddate><creator>Wu, Kai-Di</creator><creator>Chen, Kuan-Jung</creator><creator>Chen, I-Chih</creator><creator>Lee, Ming-Feng</creator><creator>Huang, Chih-Mu</creator><creator>Kuan, Ting-Chun</creator><scope>EVB</scope></search><sort><creationdate>20240409</creationdate><title>Semiconductor device and manufacturing method thereof</title><author>Wu, Kai-Di ; Chen, Kuan-Jung ; Chen, I-Chih ; Lee, Ming-Feng ; Huang, Chih-Mu ; Kuan, Ting-Chun</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11955484B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Wu, Kai-Di</creatorcontrib><creatorcontrib>Chen, Kuan-Jung</creatorcontrib><creatorcontrib>Chen, I-Chih</creatorcontrib><creatorcontrib>Lee, Ming-Feng</creatorcontrib><creatorcontrib>Huang, Chih-Mu</creatorcontrib><creatorcontrib>Kuan, Ting-Chun</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Wu, Kai-Di</au><au>Chen, Kuan-Jung</au><au>Chen, I-Chih</au><au>Lee, Ming-Feng</au><au>Huang, Chih-Mu</au><au>Kuan, Ting-Chun</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device and manufacturing method thereof</title><date>2024-04-09</date><risdate>2024</risdate><abstract>A semiconductor device includes a semiconductor substrate having a first region and a second region, insulators, gate stacks, and first and second S/Ds. The first and second regions respectively includes at least one first semiconductor fin and at least one second semiconductor fin. A width of a middle portion of the first semiconductor fin is equal to widths of end portions of the first semiconductor fin. A width of a middle portion of the second semiconductor fin is smaller than widths of end portions of the second semiconductor fin. The insulators are disposed on the semiconductor substrate. The first and second semiconductor fins are sandwiched by the insulators. The gate stacks are over a portion of the first semiconductor fin and a portion of the second semiconductor fin. The first and second S/Ds respectively covers another portion of the first semiconductor fin and another portion of the second semiconductor fin.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US11955484B2
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Semiconductor device and manufacturing method thereof
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-05T16%3A30%3A18IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Wu,%20Kai-Di&rft.date=2024-04-09&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS11955484B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true