Neural network inference circuit employing dynamic memory sleep

For a neural network inference circuit that executes a neural network including multiple computation nodes at multiple layers for which data is stored in a plurality of memory banks, some embodiments provide a method for dynamically putting memory banks into a sleep mode of operation to conserve pow...

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Bibliographische Detailangaben

Hauptverfasser:	Teig, Steven L, Duong, Kenneth, Ko, Jung
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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