Method of making a FinFET device including a step of recessing a subset of the fins

A fin-type field-effect transistor (FinFET) device includes a plurality of fins formed over a substrate. The semiconductor device further includes a dielectric layer filled in a space between each fin and over a first portion of the plurality of fins and a dielectric trench formed in the dielectric...

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Hauptverfasser: Lin, Chia Tai, Chang, An-Shen, Lin, Yih-Ann, Chen, Chao-Cheng, Chen, Ryan
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creator Lin, Chia Tai
Chang, An-Shen
Lin, Yih-Ann
Chen, Chao-Cheng
Chen, Ryan
description A fin-type field-effect transistor (FinFET) device includes a plurality of fins formed over a substrate. The semiconductor device further includes a dielectric layer filled in a space between each fin and over a first portion of the plurality of fins and a dielectric trench formed in the dielectric layer. The dielectric trench has a vertical profile. The semiconductor device further includes a second portion of the plurality of fins recessed and exposed in the dielectric trench. The second portion of the plurality of fins have a rounded-convex-shape top profile.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11908939B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11908939B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11908939B23</originalsourceid><addsrcrecordid>eNrjZAj2TS3JyE9RyE9TyE3MzsxLV0hUcMvMc3MNUUhJLctMTlXIzEvOKU2ByBSXpBaAlBalJqcWF0PFSpOKU0tAoiUZqQppmXnFPAysaYk5xam8UJqbQRFonrOHbmpBfnxqcUFicmpeakl8aLChoaWBhaWxpZORMTFqAH1UNwc</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method of making a FinFET device including a step of recessing a subset of the fins</title><source>esp@cenet</source><creator>Lin, Chia Tai ; Chang, An-Shen ; Lin, Yih-Ann ; Chen, Chao-Cheng ; Chen, Ryan</creator><creatorcontrib>Lin, Chia Tai ; Chang, An-Shen ; Lin, Yih-Ann ; Chen, Chao-Cheng ; Chen, Ryan</creatorcontrib><description>A fin-type field-effect transistor (FinFET) device includes a plurality of fins formed over a substrate. The semiconductor device further includes a dielectric layer filled in a space between each fin and over a first portion of the plurality of fins and a dielectric trench formed in the dielectric layer. The dielectric trench has a vertical profile. The semiconductor device further includes a second portion of the plurality of fins recessed and exposed in the dielectric trench. The second portion of the plurality of fins have a rounded-convex-shape top profile.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240220&amp;DB=EPODOC&amp;CC=US&amp;NR=11908939B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240220&amp;DB=EPODOC&amp;CC=US&amp;NR=11908939B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Lin, Chia Tai</creatorcontrib><creatorcontrib>Chang, An-Shen</creatorcontrib><creatorcontrib>Lin, Yih-Ann</creatorcontrib><creatorcontrib>Chen, Chao-Cheng</creatorcontrib><creatorcontrib>Chen, Ryan</creatorcontrib><title>Method of making a FinFET device including a step of recessing a subset of the fins</title><description>A fin-type field-effect transistor (FinFET) device includes a plurality of fins formed over a substrate. The semiconductor device further includes a dielectric layer filled in a space between each fin and over a first portion of the plurality of fins and a dielectric trench formed in the dielectric layer. The dielectric trench has a vertical profile. The semiconductor device further includes a second portion of the plurality of fins recessed and exposed in the dielectric trench. The second portion of the plurality of fins have a rounded-convex-shape top profile.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZAj2TS3JyE9RyE9TyE3MzsxLV0hUcMvMc3MNUUhJLctMTlXIzEvOKU2ByBSXpBaAlBalJqcWF0PFSpOKU0tAoiUZqQppmXnFPAysaYk5xam8UJqbQRFonrOHbmpBfnxqcUFicmpeakl8aLChoaWBhaWxpZORMTFqAH1UNwc</recordid><startdate>20240220</startdate><enddate>20240220</enddate><creator>Lin, Chia Tai</creator><creator>Chang, An-Shen</creator><creator>Lin, Yih-Ann</creator><creator>Chen, Chao-Cheng</creator><creator>Chen, Ryan</creator><scope>EVB</scope></search><sort><creationdate>20240220</creationdate><title>Method of making a FinFET device including a step of recessing a subset of the fins</title><author>Lin, Chia Tai ; Chang, An-Shen ; Lin, Yih-Ann ; Chen, Chao-Cheng ; Chen, Ryan</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11908939B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Lin, Chia Tai</creatorcontrib><creatorcontrib>Chang, An-Shen</creatorcontrib><creatorcontrib>Lin, Yih-Ann</creatorcontrib><creatorcontrib>Chen, Chao-Cheng</creatorcontrib><creatorcontrib>Chen, Ryan</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Lin, Chia Tai</au><au>Chang, An-Shen</au><au>Lin, Yih-Ann</au><au>Chen, Chao-Cheng</au><au>Chen, Ryan</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method of making a FinFET device including a step of recessing a subset of the fins</title><date>2024-02-20</date><risdate>2024</risdate><abstract>A fin-type field-effect transistor (FinFET) device includes a plurality of fins formed over a substrate. The semiconductor device further includes a dielectric layer filled in a space between each fin and over a first portion of the plurality of fins and a dielectric trench formed in the dielectric layer. The dielectric trench has a vertical profile. The semiconductor device further includes a second portion of the plurality of fins recessed and exposed in the dielectric trench. The second portion of the plurality of fins have a rounded-convex-shape top profile.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Method of making a FinFET device including a step of recessing a subset of the fins
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-04T23%3A26%3A13IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Lin,%20Chia%20Tai&rft.date=2024-02-20&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS11908939B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true