Semiconductor memory device for reducing effect of leakage current

A semiconductor memory device includes memory cell arrays including a first memory cell and a first word line connected to the first memory cell, a first wiring electrically connected to the first word lines corresponding to the memory cell arrays, a driver circuit electrically connected to the firs...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
1. Verfasser:	Kumazaki, Noriyasu
Format:	Patent
Sprache:	eng
Schlagworte:	INFORMATION STORAGE PHYSICS STATIC STORES
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

container_end_page
container_issue
container_start_page
container_title
container_volume
creator	Kumazaki, Noriyasu
description	A semiconductor memory device includes memory cell arrays including a first memory cell and a first word line connected to the first memory cell, a first wiring electrically connected to the first word lines corresponding to the memory cell arrays, a driver circuit electrically connected to the first wiring, second wirings electrically connected to the first wiring via the driver circuit, a voltage generation circuit including output terminals disposed corresponding to the second wirings, and first circuits disposed corresponding to the memory cell arrays. The voltage generation circuit is electrically connected to the first word lines via a first current path including the second wirings, the driver circuit, and the first wiring. The voltage generation circuit is electrically connected to the first word lines via a second current path including the second wirings and the first circuits and without including the driver circuit.
format	Patent
fullrecord	<record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11862293B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11862293B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11862293B23</originalsourceid><addsrcrecordid>eNrjZHAKTs3NTM7PSylNLskvUshNzc0vqlRISS3LTE5VSAOKFKUCpTLz0hVS09JSk0sU8tMUclITsxPTUxWSS4uKUvNKeBhY0xJzilN5oTQ3g6Kba4izh25qQX58anFBYnJqXmpJfGiwoaGFmZGRpbGTkTExagBjtTJs</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor memory device for reducing effect of leakage current</title><source>esp@cenet</source><creator>Kumazaki, Noriyasu</creator><creatorcontrib>Kumazaki, Noriyasu</creatorcontrib><description>A semiconductor memory device includes memory cell arrays including a first memory cell and a first word line connected to the first memory cell, a first wiring electrically connected to the first word lines corresponding to the memory cell arrays, a driver circuit electrically connected to the first wiring, second wirings electrically connected to the first wiring via the driver circuit, a voltage generation circuit including output terminals disposed corresponding to the second wirings, and first circuits disposed corresponding to the memory cell arrays. The voltage generation circuit is electrically connected to the first word lines via a first current path including the second wirings, the driver circuit, and the first wiring. The voltage generation circuit is electrically connected to the first word lines via a second current path including the second wirings and the first circuits and without including the driver circuit.</description><language>eng</language><subject>INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240102&DB=EPODOC&CC=US&NR=11862293B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76294</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240102&DB=EPODOC&CC=US&NR=11862293B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Kumazaki, Noriyasu</creatorcontrib><title>Semiconductor memory device for reducing effect of leakage current</title><description>A semiconductor memory device includes memory cell arrays including a first memory cell and a first word line connected to the first memory cell, a first wiring electrically connected to the first word lines corresponding to the memory cell arrays, a driver circuit electrically connected to the first wiring, second wirings electrically connected to the first wiring via the driver circuit, a voltage generation circuit including output terminals disposed corresponding to the second wirings, and first circuits disposed corresponding to the memory cell arrays. The voltage generation circuit is electrically connected to the first word lines via a first current path including the second wirings, the driver circuit, and the first wiring. The voltage generation circuit is electrically connected to the first word lines via a second current path including the second wirings and the first circuits and without including the driver circuit.</description><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHAKTs3NTM7PSylNLskvUshNzc0vqlRISS3LTE5VSAOKFKUCpTLz0hVS09JSk0sU8tMUclITsxPTUxWSS4uKUvNKeBhY0xJzilN5oTQ3g6Kba4izh25qQX58anFBYnJqXmpJfGiwoaGFmZGRpbGTkTExagBjtTJs</recordid><startdate>20240102</startdate><enddate>20240102</enddate><creator>Kumazaki, Noriyasu</creator><scope>EVB</scope></search><sort><creationdate>20240102</creationdate><title>Semiconductor memory device for reducing effect of leakage current</title><author>Kumazaki, Noriyasu</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11862293B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>Kumazaki, Noriyasu</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Kumazaki, Noriyasu</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor memory device for reducing effect of leakage current</title><date>2024-01-02</date><risdate>2024</risdate><abstract>A semiconductor memory device includes memory cell arrays including a first memory cell and a first word line connected to the first memory cell, a first wiring electrically connected to the first word lines corresponding to the memory cell arrays, a driver circuit electrically connected to the first wiring, second wirings electrically connected to the first wiring via the driver circuit, a voltage generation circuit including output terminals disposed corresponding to the second wirings, and first circuits disposed corresponding to the memory cell arrays. The voltage generation circuit is electrically connected to the first word lines via a first current path including the second wirings, the driver circuit, and the first wiring. The voltage generation circuit is electrically connected to the first word lines via a second current path including the second wirings and the first circuits and without including the driver circuit.</abstract><oa>free_for_read</oa></addata></record>
fulltext	fulltext_linktorsrc
identifier
ispartof
issn
language	eng
recordid	cdi_epo_espacenet_US11862293B2
source	esp@cenet
subjects	INFORMATION STORAGE PHYSICS STATIC STORES
title	Semiconductor memory device for reducing effect of leakage current
url	https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-22T15%3A51%3A07IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Kumazaki,%20Noriyasu&rft.date=2024-01-02&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS11862293B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true