Method for locating open circuit failure point of test structure
The present application discloses a method for locating an open circuit failure point of a test structure, which includes the following steps: step 1: providing a sample formed with a test structure, a first metal layer pattern and a second metal layer pattern of the test structure forming a series...
Gespeichert in:
Hauptverfasser: | , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | Duan, Shuqing Gao, Jinde Wu, Cheng |
description | The present application discloses a method for locating an open circuit failure point of a test structure, which includes the following steps: step 1: providing a sample formed with a test structure, a first metal layer pattern and a second metal layer pattern of the test structure forming a series resistor structure through each via; step 2: performing a first active voltage contrast test to the sample to show an open circuit point and making a first scratch mark at an adjacent position of the open circuit point; step 3: forming a coating mark at the first scratch mark on the sample; step 4: performing a second active voltage contrast test to the sample to show the open circuit point and locating a relative position of the open circuit point by using a position of the coating mark as a reference position. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11852674B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11852674B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11852674B23</originalsourceid><addsrcrecordid>eNrjZHDwTS3JyE9RSMsvUsjJT04sycxLV8gvSM1TSM4sSi7NLFFIS8zMKS1KVSjIz8wrUchPUyhJLS5RKC4pKk0uAYrzMLCmJeYUp_JCaW4GRTfXEGcP3dSC_PjU4oLE5NS81JL40GBDQwtTIzNzEycjY2LUAADfFzG1</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method for locating open circuit failure point of test structure</title><source>esp@cenet</source><creator>Duan, Shuqing ; Gao, Jinde ; Wu, Cheng</creator><creatorcontrib>Duan, Shuqing ; Gao, Jinde ; Wu, Cheng</creatorcontrib><description>The present application discloses a method for locating an open circuit failure point of a test structure, which includes the following steps: step 1: providing a sample formed with a test structure, a first metal layer pattern and a second metal layer pattern of the test structure forming a series resistor structure through each via; step 2: performing a first active voltage contrast test to the sample to show an open circuit point and making a first scratch mark at an adjacent position of the open circuit point; step 3: forming a coating mark at the first scratch mark on the sample; step 4: performing a second active voltage contrast test to the sample to show the open circuit point and locating a relative position of the open circuit point by using a position of the coating mark as a reference position.</description><language>eng</language><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; PRINTED CIRCUITS ; TESTING</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231226&DB=EPODOC&CC=US&NR=11852674B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25562,76317</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231226&DB=EPODOC&CC=US&NR=11852674B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Duan, Shuqing</creatorcontrib><creatorcontrib>Gao, Jinde</creatorcontrib><creatorcontrib>Wu, Cheng</creatorcontrib><title>Method for locating open circuit failure point of test structure</title><description>The present application discloses a method for locating an open circuit failure point of a test structure, which includes the following steps: step 1: providing a sample formed with a test structure, a first metal layer pattern and a second metal layer pattern of the test structure forming a series resistor structure through each via; step 2: performing a first active voltage contrast test to the sample to show an open circuit point and making a first scratch mark at an adjacent position of the open circuit point; step 3: forming a coating mark at the first scratch mark on the sample; step 4: performing a second active voltage contrast test to the sample to show the open circuit point and locating a relative position of the open circuit point by using a position of the coating mark as a reference position.</description><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>PRINTED CIRCUITS</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHDwTS3JyE9RSMsvUsjJT04sycxLV8gvSM1TSM4sSi7NLFFIS8zMKS1KVSjIz8wrUchPUyhJLS5RKC4pKk0uAYrzMLCmJeYUp_JCaW4GRTfXEGcP3dSC_PjU4oLE5NS81JL40GBDQwtTIzNzEycjY2LUAADfFzG1</recordid><startdate>20231226</startdate><enddate>20231226</enddate><creator>Duan, Shuqing</creator><creator>Gao, Jinde</creator><creator>Wu, Cheng</creator><scope>EVB</scope></search><sort><creationdate>20231226</creationdate><title>Method for locating open circuit failure point of test structure</title><author>Duan, Shuqing ; Gao, Jinde ; Wu, Cheng</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11852674B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2023</creationdate><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>PRINTED CIRCUITS</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>Duan, Shuqing</creatorcontrib><creatorcontrib>Gao, Jinde</creatorcontrib><creatorcontrib>Wu, Cheng</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Duan, Shuqing</au><au>Gao, Jinde</au><au>Wu, Cheng</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method for locating open circuit failure point of test structure</title><date>2023-12-26</date><risdate>2023</risdate><abstract>The present application discloses a method for locating an open circuit failure point of a test structure, which includes the following steps: step 1: providing a sample formed with a test structure, a first metal layer pattern and a second metal layer pattern of the test structure forming a series resistor structure through each via; step 2: performing a first active voltage contrast test to the sample to show an open circuit point and making a first scratch mark at an adjacent position of the open circuit point; step 3: forming a coating mark at the first scratch mark on the sample; step 4: performing a second active voltage contrast test to the sample to show the open circuit point and locating a relative position of the open circuit point by using a position of the coating mark as a reference position.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US11852674B2 |
source | esp@cenet |
subjects | CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS PRINTED CIRCUITS TESTING |
title | Method for locating open circuit failure point of test structure |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-13T17%3A36%3A31IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Duan,%20Shuqing&rft.date=2023-12-26&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS11852674B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |