Redundancy schemes for repairing column defects

A memory device is provided that includes a memory array including a first array, a first redundant array that is local to the first array, a second array, and a second redundant array that is local to the second array, a cache array including a first cache, a first redundant cache that is local to...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Hung, Shuo-Nan, Lu, Hung-Wei, Liang, Che-Wei, Tu, Ming-Cheng
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING INFORMATION STORAGE PHYSICS STATIC STORES
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