Instruction simulation device and method thereof

An instruction simulation device and a method thereof are provided. The simulation device includes a monitor, which is configured to determine whether a ready-for-execution instruction is an instruction under a new/extended instruction set sharing the same instruction set architecture as that of the...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Wang, Weilin, Guan, Yingbing, Yang, Mengchen
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Wang, Weilin
Guan, Yingbing
Yang, Mengchen
description An instruction simulation device and a method thereof are provided. The simulation device includes a monitor, which is configured to determine whether a ready-for-execution instruction is an instruction under a new/extended instruction set sharing the same instruction set architecture as that of the processor. If the ready-for-execution instruction is an extended instruction, it is converted into a simulation program which consists of a compatible instruction sequence further composed of at least one native instruction of the processor or a compatible instruction recognizable/executable by the processor. An execution result of the extended instruction is simulated by executing the simulation program, thereby extending the service life of an electronic appliance embodied with the disclosed simulation device therein.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11803381B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11803381B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11803381B23</originalsourceid><addsrcrecordid>eNrjZDDwzCsuKSpNLsnMz1MozswtzUkEM1NSyzKTUxUS81IUclNLMvJTFEoyUotS89N4GFjTEnOKU3mhNDeDoptriLOHbmpBfnxqcUFicmpeakl8aLChoYWBsbGFoZORMTFqAJoOK9U</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Instruction simulation device and method thereof</title><source>esp@cenet</source><creator>Wang, Weilin ; Guan, Yingbing ; Yang, Mengchen</creator><creatorcontrib>Wang, Weilin ; Guan, Yingbing ; Yang, Mengchen</creatorcontrib><description>An instruction simulation device and a method thereof are provided. The simulation device includes a monitor, which is configured to determine whether a ready-for-execution instruction is an instruction under a new/extended instruction set sharing the same instruction set architecture as that of the processor. If the ready-for-execution instruction is an extended instruction, it is converted into a simulation program which consists of a compatible instruction sequence further composed of at least one native instruction of the processor or a compatible instruction recognizable/executable by the processor. An execution result of the extended instruction is simulated by executing the simulation program, thereby extending the service life of an electronic appliance embodied with the disclosed simulation device therein.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20231031&amp;DB=EPODOC&amp;CC=US&amp;NR=11803381B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20231031&amp;DB=EPODOC&amp;CC=US&amp;NR=11803381B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Wang, Weilin</creatorcontrib><creatorcontrib>Guan, Yingbing</creatorcontrib><creatorcontrib>Yang, Mengchen</creatorcontrib><title>Instruction simulation device and method thereof</title><description>An instruction simulation device and a method thereof are provided. The simulation device includes a monitor, which is configured to determine whether a ready-for-execution instruction is an instruction under a new/extended instruction set sharing the same instruction set architecture as that of the processor. If the ready-for-execution instruction is an extended instruction, it is converted into a simulation program which consists of a compatible instruction sequence further composed of at least one native instruction of the processor or a compatible instruction recognizable/executable by the processor. An execution result of the extended instruction is simulated by executing the simulation program, thereby extending the service life of an electronic appliance embodied with the disclosed simulation device therein.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDDwzCsuKSpNLsnMz1MozswtzUkEM1NSyzKTUxUS81IUclNLMvJTFEoyUotS89N4GFjTEnOKU3mhNDeDoptriLOHbmpBfnxqcUFicmpeakl8aLChoYWBsbGFoZORMTFqAJoOK9U</recordid><startdate>20231031</startdate><enddate>20231031</enddate><creator>Wang, Weilin</creator><creator>Guan, Yingbing</creator><creator>Yang, Mengchen</creator><scope>EVB</scope></search><sort><creationdate>20231031</creationdate><title>Instruction simulation device and method thereof</title><author>Wang, Weilin ; Guan, Yingbing ; Yang, Mengchen</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11803381B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2023</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>Wang, Weilin</creatorcontrib><creatorcontrib>Guan, Yingbing</creatorcontrib><creatorcontrib>Yang, Mengchen</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Wang, Weilin</au><au>Guan, Yingbing</au><au>Yang, Mengchen</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Instruction simulation device and method thereof</title><date>2023-10-31</date><risdate>2023</risdate><abstract>An instruction simulation device and a method thereof are provided. The simulation device includes a monitor, which is configured to determine whether a ready-for-execution instruction is an instruction under a new/extended instruction set sharing the same instruction set architecture as that of the processor. If the ready-for-execution instruction is an extended instruction, it is converted into a simulation program which consists of a compatible instruction sequence further composed of at least one native instruction of the processor or a compatible instruction recognizable/executable by the processor. An execution result of the extended instruction is simulated by executing the simulation program, thereby extending the service life of an electronic appliance embodied with the disclosed simulation device therein.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US11803381B2
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Instruction simulation device and method thereof
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-30T20%3A55%3A21IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Wang,%20Weilin&rft.date=2023-10-31&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS11803381B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true