Corner guard for improved electroplated first level interconnect bump height range
Embodiments disclosed herein include electronic packages and methods of forming such packages. In an embodiment an electronic package comprises a package substrate, and a first level interconnect (FLI) bump region on the package substrate. In an embodiment, the FLI bump region comprises a plurality...
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creator | Haehn, Nicholas S Singh, Antariksh Rao Pratap Vehonsky, Jacob Jain, Rahul Cetegen, Edvin Cho, Steve S Heaton, Thomas Chan Arguedas, Sergio Ibrahim, Tarek Neal, Nicholas |
description | Embodiments disclosed herein include electronic packages and methods of forming such packages. In an embodiment an electronic package comprises a package substrate, and a first level interconnect (FLI) bump region on the package substrate. In an embodiment, the FLI bump region comprises a plurality of pads, and a plurality of bumps, where each bump is over a different one of the plurality of pads. In an embodiment, the electronic package further comprises a guard feature adjacent to the FLI bump region. In an embodiment, the guard feature comprises, a guard pad, and a guard bump over the guard pad, wherein the guard feature is electrically isolated from circuitry of the electronic package. |
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In an embodiment, the guard feature comprises, a guard pad, and a guard bump over the guard pad, wherein the guard feature is electrically isolated from circuitry of the electronic package.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231003&DB=EPODOC&CC=US&NR=11776864B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231003&DB=EPODOC&CC=US&NR=11776864B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Haehn, Nicholas S</creatorcontrib><creatorcontrib>Singh, Antariksh Rao Pratap</creatorcontrib><creatorcontrib>Vehonsky, Jacob</creatorcontrib><creatorcontrib>Jain, Rahul</creatorcontrib><creatorcontrib>Cetegen, Edvin</creatorcontrib><creatorcontrib>Cho, Steve S</creatorcontrib><creatorcontrib>Heaton, Thomas</creatorcontrib><creatorcontrib>Chan Arguedas, Sergio</creatorcontrib><creatorcontrib>Ibrahim, Tarek</creatorcontrib><creatorcontrib>Neal, Nicholas</creatorcontrib><title>Corner guard for improved electroplated first level interconnect bump height range</title><description>Embodiments disclosed herein include electronic packages and methods of forming such packages. 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In an embodiment an electronic package comprises a package substrate, and a first level interconnect (FLI) bump region on the package substrate. In an embodiment, the FLI bump region comprises a plurality of pads, and a plurality of bumps, where each bump is over a different one of the plurality of pads. In an embodiment, the electronic package further comprises a guard feature adjacent to the FLI bump region. In an embodiment, the guard feature comprises, a guard pad, and a guard bump over the guard pad, wherein the guard feature is electrically isolated from circuitry of the electronic package.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Corner guard for improved electroplated first level interconnect bump height range |
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