Semiconductor memory stacks connected to processing units and associated systems and methods
A semiconductor memory stack connected to a processing unit, and associated methods and systems are disclosed. In some embodiments, the semiconductor memory stack may include one or more memory dies attached to and carried by a memory controller die-e.g., high-bandwidth memory. Further, a processing...
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creator | Kirby, Kyle K |
description | A semiconductor memory stack connected to a processing unit, and associated methods and systems are disclosed. In some embodiments, the semiconductor memory stack may include one or more memory dies attached to and carried by a memory controller die-e.g., high-bandwidth memory. Further, a processing unit (e.g., a processor) may be attached to the memory controller die without an interposer to provide the shortest possible route for signals traveling between the semiconductor memory stack and the processing unit. In addition, the semiconductor memory stack and the processing unit can be attached to a package substrate without an interposer. |
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In some embodiments, the semiconductor memory stack may include one or more memory dies attached to and carried by a memory controller die-e.g., high-bandwidth memory. Further, a processing unit (e.g., a processor) may be attached to the memory controller die without an interposer to provide the shortest possible route for signals traveling between the semiconductor memory stack and the processing unit. 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In addition, the semiconductor memory stack and the processing unit can be attached to a package substrate without an interposer.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyjEKwkAQQNFtLES9w3gAiyQErRXFPtoJYZkdddGdWXYmRW6vogew-vD4U3fpKEUUDgOaFEiUpIyg5vGh8HYmNApgArkIkmrkGwwcTcFzAK8qGP1n0VGN0pcT2V2Czt3k6p9Ki19nbnnYn3bHFWXpSbNHYrL-3FXVumnberOtm3-eFz4MPPA</recordid><startdate>20230822</startdate><enddate>20230822</enddate><creator>Kirby, Kyle K</creator><scope>EVB</scope></search><sort><creationdate>20230822</creationdate><title>Semiconductor memory stacks connected to processing units and associated systems and methods</title><author>Kirby, Kyle K</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11735528B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2023</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>Kirby, Kyle K</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Kirby, Kyle K</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor memory stacks connected to processing units and associated systems and methods</title><date>2023-08-22</date><risdate>2023</risdate><abstract>A semiconductor memory stack connected to a processing unit, and associated methods and systems are disclosed. In some embodiments, the semiconductor memory stack may include one or more memory dies attached to and carried by a memory controller die-e.g., high-bandwidth memory. Further, a processing unit (e.g., a processor) may be attached to the memory controller die without an interposer to provide the shortest possible route for signals traveling between the semiconductor memory stack and the processing unit. In addition, the semiconductor memory stack and the processing unit can be attached to a package substrate without an interposer.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INFORMATION STORAGE PHYSICS SEMICONDUCTOR DEVICES STATIC STORES |
title | Semiconductor memory stacks connected to processing units and associated systems and methods |
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