Apparatus and method for channel equalization based on error detection

An apparatus includes an equalization circuit, an error prediction circuit, a sequence estimation circuit, and a selection circuit. The equalization circuit is configured to generate a first data sequence and a first equalized signal from an input signal received through a channel. The error predict...

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Hauptverfasser: Suh, Youngseob, Chun, Junghoon, Lim, Donghyuk, Cho, Byungwook
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creator Suh, Youngseob
Chun, Junghoon
Lim, Donghyuk
Cho, Byungwook
description An apparatus includes an equalization circuit, an error prediction circuit, a sequence estimation circuit, and a selection circuit. The equalization circuit is configured to generate a first data sequence and a first equalized signal from an input signal received through a channel. The error prediction circuit is configured to predict an error based on the first equalized signal when the error is predicted. When the error is predicted, the sequence estimation circuit is configured to generate a second data sequence from the first data sequence and the predicted error. The selection circuit is configured to output the second data sequence when the predicted error is determined to be an actual error and to otherwise output the first data sequence.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11711245B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11711245B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11711245B23</originalsourceid><addsrcrecordid>eNrjZHBzLChILEosKS1WSMxLUchNLcnIT1FIyy9SSM5IzMtLzVFILSxNzMmsSizJzM9TSEosTk1RADJSi4qAalJSS1KTQRI8DKxpiTnFqbxQmptB0c01xNlDN7UgPz61uCAxOTUvtSQ-NNjQ0NzQ0MjE1MnImBg1ADv3M80</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Apparatus and method for channel equalization based on error detection</title><source>esp@cenet</source><creator>Suh, Youngseob ; Chun, Junghoon ; Lim, Donghyuk ; Cho, Byungwook</creator><creatorcontrib>Suh, Youngseob ; Chun, Junghoon ; Lim, Donghyuk ; Cho, Byungwook</creatorcontrib><description>An apparatus includes an equalization circuit, an error prediction circuit, a sequence estimation circuit, and a selection circuit. The equalization circuit is configured to generate a first data sequence and a first equalized signal from an input signal received through a channel. The error prediction circuit is configured to predict an error based on the first equalized signal when the error is predicted. When the error is predicted, the sequence estimation circuit is configured to generate a second data sequence from the first data sequence and the predicted error. The selection circuit is configured to output the second data sequence when the predicted error is determined to be an actual error and to otherwise output the first data sequence.</description><language>eng</language><subject>ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRICITY ; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20230725&amp;DB=EPODOC&amp;CC=US&amp;NR=11711245B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20230725&amp;DB=EPODOC&amp;CC=US&amp;NR=11711245B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Suh, Youngseob</creatorcontrib><creatorcontrib>Chun, Junghoon</creatorcontrib><creatorcontrib>Lim, Donghyuk</creatorcontrib><creatorcontrib>Cho, Byungwook</creatorcontrib><title>Apparatus and method for channel equalization based on error detection</title><description>An apparatus includes an equalization circuit, an error prediction circuit, a sequence estimation circuit, and a selection circuit. The equalization circuit is configured to generate a first data sequence and a first equalized signal from an input signal received through a channel. The error prediction circuit is configured to predict an error based on the first equalized signal when the error is predicted. When the error is predicted, the sequence estimation circuit is configured to generate a second data sequence from the first data sequence and the predicted error. The selection circuit is configured to output the second data sequence when the predicted error is determined to be an actual error and to otherwise output the first data sequence.</description><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRICITY</subject><subject>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHBzLChILEosKS1WSMxLUchNLcnIT1FIyy9SSM5IzMtLzVFILSxNzMmsSizJzM9TSEosTk1RADJSi4qAalJSS1KTQRI8DKxpiTnFqbxQmptB0c01xNlDN7UgPz61uCAxOTUvtSQ-NNjQ0NzQ0MjE1MnImBg1ADv3M80</recordid><startdate>20230725</startdate><enddate>20230725</enddate><creator>Suh, Youngseob</creator><creator>Chun, Junghoon</creator><creator>Lim, Donghyuk</creator><creator>Cho, Byungwook</creator><scope>EVB</scope></search><sort><creationdate>20230725</creationdate><title>Apparatus and method for channel equalization based on error detection</title><author>Suh, Youngseob ; Chun, Junghoon ; Lim, Donghyuk ; Cho, Byungwook</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11711245B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2023</creationdate><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRICITY</topic><topic>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</topic><toplevel>online_resources</toplevel><creatorcontrib>Suh, Youngseob</creatorcontrib><creatorcontrib>Chun, Junghoon</creatorcontrib><creatorcontrib>Lim, Donghyuk</creatorcontrib><creatorcontrib>Cho, Byungwook</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Suh, Youngseob</au><au>Chun, Junghoon</au><au>Lim, Donghyuk</au><au>Cho, Byungwook</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Apparatus and method for channel equalization based on error detection</title><date>2023-07-25</date><risdate>2023</risdate><abstract>An apparatus includes an equalization circuit, an error prediction circuit, a sequence estimation circuit, and a selection circuit. The equalization circuit is configured to generate a first data sequence and a first equalized signal from an input signal received through a channel. The error prediction circuit is configured to predict an error based on the first equalized signal when the error is predicted. When the error is predicted, the sequence estimation circuit is configured to generate a second data sequence from the first data sequence and the predicted error. The selection circuit is configured to output the second data sequence when the predicted error is determined to be an actual error and to otherwise output the first data sequence.</abstract><oa>free_for_read</oa></addata></record>
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subjects ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
title Apparatus and method for channel equalization based on error detection
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-20T19%3A03%3A06IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Suh,%20Youngseob&rft.date=2023-07-25&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS11711245B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true