Fan-out semiconductor package
A method for manufacturing a semiconductor package includes disposing a semiconductor chip having contact pads, and a connection structure around the semiconductor chip on a supporting substrate, with the contact pads facing the supporting substrate, forming an encapsulant encapsulating the semicond...
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creator | Choi, Ik Jun Byun, Jung Soo Jeong, Kwang Ok Lee, Jae Ean Ko, Young Gwan |
description | A method for manufacturing a semiconductor package includes disposing a semiconductor chip having contact pads, and a connection structure around the semiconductor chip on a supporting substrate, with the contact pads facing the supporting substrate, forming an encapsulant encapsulating the semiconductor chip and the connection structure on the supporting substrate, embedding a wiring pattern having a connection portion in the encapsulant, the connection portion having a connection hole, forming a through hole penetrating the encapsulant in the connection hole, the through hole exposing a portion of an upper surface of the connection structure, and forming a conductive via in the through hole, the conductive via connecting the wiring pattern to the connection structure. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11699643B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11699643B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11699643B23</originalsourceid><addsrcrecordid>eNrjZJB1S8zTzS8tUShOzc1Mzs9LKU0uyS9SKEhMzk5MT-VhYE1LzClO5YXS3AyKbq4hzh66qQX58anFQFWpeakl8aHBhoZmlpZmJsZORsbEqAEA1dokaw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Fan-out semiconductor package</title><source>esp@cenet</source><creator>Choi, Ik Jun ; Byun, Jung Soo ; Jeong, Kwang Ok ; Lee, Jae Ean ; Ko, Young Gwan</creator><creatorcontrib>Choi, Ik Jun ; Byun, Jung Soo ; Jeong, Kwang Ok ; Lee, Jae Ean ; Ko, Young Gwan</creatorcontrib><description>A method for manufacturing a semiconductor package includes disposing a semiconductor chip having contact pads, and a connection structure around the semiconductor chip on a supporting substrate, with the contact pads facing the supporting substrate, forming an encapsulant encapsulating the semiconductor chip and the connection structure on the supporting substrate, embedding a wiring pattern having a connection portion in the encapsulant, the connection portion having a connection hole, forming a through hole penetrating the encapsulant in the connection hole, the through hole exposing a portion of an upper surface of the connection structure, and forming a conductive via in the through hole, the conductive via connecting the wiring pattern to the connection structure.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230711&DB=EPODOC&CC=US&NR=11699643B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230711&DB=EPODOC&CC=US&NR=11699643B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Choi, Ik Jun</creatorcontrib><creatorcontrib>Byun, Jung Soo</creatorcontrib><creatorcontrib>Jeong, Kwang Ok</creatorcontrib><creatorcontrib>Lee, Jae Ean</creatorcontrib><creatorcontrib>Ko, Young Gwan</creatorcontrib><title>Fan-out semiconductor package</title><description>A method for manufacturing a semiconductor package includes disposing a semiconductor chip having contact pads, and a connection structure around the semiconductor chip on a supporting substrate, with the contact pads facing the supporting substrate, forming an encapsulant encapsulating the semiconductor chip and the connection structure on the supporting substrate, embedding a wiring pattern having a connection portion in the encapsulant, the connection portion having a connection hole, forming a through hole penetrating the encapsulant in the connection hole, the through hole exposing a portion of an upper surface of the connection structure, and forming a conductive via in the through hole, the conductive via connecting the wiring pattern to the connection structure.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJB1S8zTzS8tUShOzc1Mzs9LKU0uyS9SKEhMzk5MT-VhYE1LzClO5YXS3AyKbq4hzh66qQX58anFQFWpeakl8aHBhoZmlpZmJsZORsbEqAEA1dokaw</recordid><startdate>20230711</startdate><enddate>20230711</enddate><creator>Choi, Ik Jun</creator><creator>Byun, Jung Soo</creator><creator>Jeong, Kwang Ok</creator><creator>Lee, Jae Ean</creator><creator>Ko, Young Gwan</creator><scope>EVB</scope></search><sort><creationdate>20230711</creationdate><title>Fan-out semiconductor package</title><author>Choi, Ik Jun ; Byun, Jung Soo ; Jeong, Kwang Ok ; Lee, Jae Ean ; Ko, Young Gwan</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11699643B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2023</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Choi, Ik Jun</creatorcontrib><creatorcontrib>Byun, Jung Soo</creatorcontrib><creatorcontrib>Jeong, Kwang Ok</creatorcontrib><creatorcontrib>Lee, Jae Ean</creatorcontrib><creatorcontrib>Ko, Young Gwan</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Choi, Ik Jun</au><au>Byun, Jung Soo</au><au>Jeong, Kwang Ok</au><au>Lee, Jae Ean</au><au>Ko, Young Gwan</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Fan-out semiconductor package</title><date>2023-07-11</date><risdate>2023</risdate><abstract>A method for manufacturing a semiconductor package includes disposing a semiconductor chip having contact pads, and a connection structure around the semiconductor chip on a supporting substrate, with the contact pads facing the supporting substrate, forming an encapsulant encapsulating the semiconductor chip and the connection structure on the supporting substrate, embedding a wiring pattern having a connection portion in the encapsulant, the connection portion having a connection hole, forming a through hole penetrating the encapsulant in the connection hole, the through hole exposing a portion of an upper surface of the connection structure, and forming a conductive via in the through hole, the conductive via connecting the wiring pattern to the connection structure.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Fan-out semiconductor package |
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