Integrated circuit and operating method thereof

Provided is an integrated circuit. The integrated circuit includes a plurality of clock generators configured to respectively generate a plurality of clock signals, a plurality of logic circuits configured to operate in synchronization with the plurality of clock signals, and controller circuitry co...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Park, Sungcheol, Ahn, Jieun, Bae, Kiseok
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:Provided is an integrated circuit. The integrated circuit includes a plurality of clock generators configured to respectively generate a plurality of clock signals, a plurality of logic circuits configured to operate in synchronization with the plurality of clock signals, and controller circuitry configured to identify meta-stability information based on frequencies of the plurality of clock signals, and configured to control at least one clock generator so that at least one of the plurality of clock signals is randomly delayed in response to the meta-stability information.