Out-of-order block-based processors and instruction schedulers using ready state data indexed by instruction position identifiers

Apparatus and methods are disclosed for implementing block-based processors including field programmable gate-array implementations. In one example of the disclosed technology, a block-based processor includes an instruction decoder configured to generate decoded ready dependencies for a transaction...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Smith, Aaron L, Gray, Jan S
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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