Address scheduling methods for non-volatile memory devices with three-dimensional memory cell arrays

At least one address scheduling method includes selecting a first bit line, selecting a first string connected to the first bit line, performing address scheduling on N pages of each of multi-level cells in the first string sequentially from a bottom word line to a top word line, and after completin...

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Bibliographische Detailangaben

Hauptverfasser:	Yun, Jung-Yun, Nam, Sang-Wan, Chae, Dong Hyuk, Yoon, Chi Weon
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING INFORMATION STORAGE PHYSICS STATIC STORES
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