Address scheduling methods for non-volatile memory devices with three-dimensional memory cell arrays
At least one address scheduling method includes selecting a first bit line, selecting a first string connected to the first bit line, performing address scheduling on N pages of each of multi-level cells in the first string sequentially from a bottom word line to a top word line, and after completin...
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creator | Yun, Jung-Yun Nam, Sang-Wan Chae, Dong Hyuk Yoon, Chi Weon |
description | At least one address scheduling method includes selecting a first bit line, selecting a first string connected to the first bit line, performing address scheduling on N pages of each of multi-level cells in the first string sequentially from a bottom word line to a top word line, and after completing the address scheduling on all word lines in the first string, performing address scheduling on second to k-th strings sequentially in the same manner as performed with respect to the first string, where "k" is 2 or a natural number greater than 2. |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING INFORMATION STORAGE PHYSICS STATIC STORES |
title | Address scheduling methods for non-volatile memory devices with three-dimensional memory cell arrays |
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