System and method for hardware component connectivity verification
System, apparatus, and/or a method for checking hardware components in an information handling system is disclosed that includes selecting a hardware component for testing; supplying power to the hardware component independent from the power supply provided by the information handling system; perfor...
Gespeichert in:
| Hauptverfasser: | , , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | Morales, Jose Green, David Johnson, Donna Lopez, Rodolfo Pena, Jarom |
| description | System, apparatus, and/or a method for checking hardware components in an information handling system is disclosed that includes selecting a hardware component for testing; supplying power to the hardware component independent from the power supply provided by the information handling system; performing testing on the selected hardware component using power supplied by the independent power supply; determining the success or failure of the testing on the selected hardware component; indicating the result of the testing on the selected hardware component; and if the result of the testing on the selected hardware component is successful indicate the hardware component passed the testing, and if the result of the testing on the selected hardware component is not successful re-seat the hardware component and perform the testing on the selected hardware again. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11609832B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11609832B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11609832B23</originalsourceid><addsrcrecordid>eNrjZHAKriwuSc1VSMxLUchNLcnIT1FIyy9SyEgsSilPLEpVSM7PLcjPS80rAbLy8lKTSzLLMksqFcpSizLTMpMTSzLz83gYWNMSc4pTeaE0N4Oim2uIs4duakF-fGpxQWJyal5qSXxosKGhmYGlhbGRk5ExMWoAkEoy_A</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>System and method for hardware component connectivity verification</title><source>esp@cenet</source><creator>Morales, Jose ; Green, David ; Johnson, Donna ; Lopez, Rodolfo ; Pena, Jarom</creator><creatorcontrib>Morales, Jose ; Green, David ; Johnson, Donna ; Lopez, Rodolfo ; Pena, Jarom</creatorcontrib><description>System, apparatus, and/or a method for checking hardware components in an information handling system is disclosed that includes selecting a hardware component for testing; supplying power to the hardware component independent from the power supply provided by the information handling system; performing testing on the selected hardware component using power supplied by the independent power supply; determining the success or failure of the testing on the selected hardware component; indicating the result of the testing on the selected hardware component; and if the result of the testing on the selected hardware component is successful indicate the hardware component passed the testing, and if the result of the testing on the selected hardware component is not successful re-seat the hardware component and perform the testing on the selected hardware again.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; CALCULATING ; COMPUTING ; COUNTING ; CURRENT COLLECTORS ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRICITY ; LINE CONNECTORS ; PHYSICS</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230321&DB=EPODOC&CC=US&NR=11609832B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25544,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230321&DB=EPODOC&CC=US&NR=11609832B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Morales, Jose</creatorcontrib><creatorcontrib>Green, David</creatorcontrib><creatorcontrib>Johnson, Donna</creatorcontrib><creatorcontrib>Lopez, Rodolfo</creatorcontrib><creatorcontrib>Pena, Jarom</creatorcontrib><title>System and method for hardware component connectivity verification</title><description>System, apparatus, and/or a method for checking hardware components in an information handling system is disclosed that includes selecting a hardware component for testing; supplying power to the hardware component independent from the power supply provided by the information handling system; performing testing on the selected hardware component using power supplied by the independent power supply; determining the success or failure of the testing on the selected hardware component; indicating the result of the testing on the selected hardware component; and if the result of the testing on the selected hardware component is successful indicate the hardware component passed the testing, and if the result of the testing on the selected hardware component is not successful re-seat the hardware component and perform the testing on the selected hardware again.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>CURRENT COLLECTORS</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRICITY</subject><subject>LINE CONNECTORS</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHAKriwuSc1VSMxLUchNLcnIT1FIyy9SyEgsSilPLEpVSM7PLcjPS80rAbLy8lKTSzLLMksqFcpSizLTMpMTSzLz83gYWNMSc4pTeaE0N4Oim2uIs4duakF-fGpxQWJyal5qSXxosKGhmYGlhbGRk5ExMWoAkEoy_A</recordid><startdate>20230321</startdate><enddate>20230321</enddate><creator>Morales, Jose</creator><creator>Green, David</creator><creator>Johnson, Donna</creator><creator>Lopez, Rodolfo</creator><creator>Pena, Jarom</creator><scope>EVB</scope></search><sort><creationdate>20230321</creationdate><title>System and method for hardware component connectivity verification</title><author>Morales, Jose ; Green, David ; Johnson, Donna ; Lopez, Rodolfo ; Pena, Jarom</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11609832B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2023</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>CURRENT COLLECTORS</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRICITY</topic><topic>LINE CONNECTORS</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>Morales, Jose</creatorcontrib><creatorcontrib>Green, David</creatorcontrib><creatorcontrib>Johnson, Donna</creatorcontrib><creatorcontrib>Lopez, Rodolfo</creatorcontrib><creatorcontrib>Pena, Jarom</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Morales, Jose</au><au>Green, David</au><au>Johnson, Donna</au><au>Lopez, Rodolfo</au><au>Pena, Jarom</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>System and method for hardware component connectivity verification</title><date>2023-03-21</date><risdate>2023</risdate><abstract>System, apparatus, and/or a method for checking hardware components in an information handling system is disclosed that includes selecting a hardware component for testing; supplying power to the hardware component independent from the power supply provided by the information handling system; performing testing on the selected hardware component using power supplied by the independent power supply; determining the success or failure of the testing on the selected hardware component; indicating the result of the testing on the selected hardware component; and if the result of the testing on the selected hardware component is successful indicate the hardware component passed the testing, and if the result of the testing on the selected hardware component is not successful re-seat the hardware component and perform the testing on the selected hardware again.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US11609832B2 |
| source | esp@cenet |
| subjects | BASIC ELECTRIC ELEMENTS CALCULATING COMPUTING COUNTING CURRENT COLLECTORS ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY LINE CONNECTORS PHYSICS |
| title | System and method for hardware component connectivity verification |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-27T20%3A10%3A07IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Morales,%20Jose&rft.date=2023-03-21&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS11609832B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |