Transceiver performing internal loopback test and operation method thereof
Disclosed is a transceiver which includes a logic circuit that generates parallel transmission data in response to a first test mode signal or a second test mode signal, a serializer that converts the parallel transmission data into serial transmission data, a driver that outputs the serial transmis...
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| creator | Shin, Jongshin Nam, Yungeun Chung, Younwoong |
| description | Disclosed is a transceiver which includes a logic circuit that generates parallel transmission data in response to a first test mode signal or a second test mode signal, a serializer that converts the parallel transmission data into serial transmission data, a driver that outputs the serial transmission data through transmission pads, an analog circuit that receives serial reception data through reception pads, a deserializer that converts the serial reception data into parallel reception data, a plurality of test switches switched in response to the first test mode signal, and a test circuit that is electrically connected to the analog circuit through the plurality of test switches and outputs serial post data corresponding to the serial transmission data to the analog circuit. |
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| subjects | BASIC ELECTRONIC CIRCUITRY ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY PULSE TECHNIQUE TRANSMISSION |
| title | Transceiver performing internal loopback test and operation method thereof |
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