Pixel array substrate

Pixel array substrate

A pixel array substrate, including gate elements and transfer elements, is provided. The gate elements include an n-th gate element and an m-th gate element. The transfer elements include a n-th transfer element and an m-th transfer element electrically connected to the n-th gate element and the m-t...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Liao, Chen-Hsien, Cheng, Sheng-Yen, Shih, Ping-Hung, Hsu, Ya-Ling, Lee, Min-Tse, Chung, Yueh-Hung, Tai, Peng-Che
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Liao, Chen-Hsien
Cheng, Sheng-Yen
Shih, Ping-Hung
Hsu, Ya-Ling
Lee, Min-Tse
Chung, Yueh-Hung
Tai, Peng-Che
description A pixel array substrate, including gate elements and transfer elements, is provided. The gate elements include an n-th gate element and an m-th gate element. The transfer elements include a n-th transfer element and an m-th transfer element electrically connected to the n-th gate element and the m-th gate element respectively. A peripheral portion of each of the transfer elements includes a first straight section. A peripheral portion of the n-th transfer element further includes a first lateral section. The first lateral section of the n-th transfer element and the first straight section of the n-th transfer element respectively belong to a first conductive layer and a second conductive layer. A peripheral portion of the m-th transfer element crosses over the first lateral section of the peripheral portion of the n-th transfer element.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11574935B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11574935B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11574935B23</originalsourceid><addsrcrecordid>eNrjZBANyKxIzVFILCpKrFQoLk0qLilKLEnlYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxocGGhqbmJpbGpk5GxsSoAQCE-CF0</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Pixel array substrate</title><source>esp@cenet</source><creator>Liao, Chen-Hsien ; Cheng, Sheng-Yen ; Shih, Ping-Hung ; Hsu, Ya-Ling ; Lee, Min-Tse ; Chung, Yueh-Hung ; Tai, Peng-Che</creator><creatorcontrib>Liao, Chen-Hsien ; Cheng, Sheng-Yen ; Shih, Ping-Hung ; Hsu, Ya-Ling ; Lee, Min-Tse ; Chung, Yueh-Hung ; Tai, Peng-Che</creatorcontrib><description>A pixel array substrate, including gate elements and transfer elements, is provided. The gate elements include an n-th gate element and an m-th gate element. The transfer elements include a n-th transfer element and an m-th transfer element electrically connected to the n-th gate element and the m-th gate element respectively. A peripheral portion of each of the transfer elements includes a first straight section. A peripheral portion of the n-th transfer element further includes a first lateral section. The first lateral section of the n-th transfer element and the first straight section of the n-th transfer element respectively belong to a first conductive layer and a second conductive layer. A peripheral portion of the m-th transfer element crosses over the first lateral section of the peripheral portion of the n-th transfer element.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20230207&amp;DB=EPODOC&amp;CC=US&amp;NR=11574935B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25562,76317</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20230207&amp;DB=EPODOC&amp;CC=US&amp;NR=11574935B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Liao, Chen-Hsien</creatorcontrib><creatorcontrib>Cheng, Sheng-Yen</creatorcontrib><creatorcontrib>Shih, Ping-Hung</creatorcontrib><creatorcontrib>Hsu, Ya-Ling</creatorcontrib><creatorcontrib>Lee, Min-Tse</creatorcontrib><creatorcontrib>Chung, Yueh-Hung</creatorcontrib><creatorcontrib>Tai, Peng-Che</creatorcontrib><title>Pixel array substrate</title><description>A pixel array substrate, including gate elements and transfer elements, is provided. The gate elements include an n-th gate element and an m-th gate element. The transfer elements include a n-th transfer element and an m-th transfer element electrically connected to the n-th gate element and the m-th gate element respectively. A peripheral portion of each of the transfer elements includes a first straight section. A peripheral portion of the n-th transfer element further includes a first lateral section. The first lateral section of the n-th transfer element and the first straight section of the n-th transfer element respectively belong to a first conductive layer and a second conductive layer. A peripheral portion of the m-th transfer element crosses over the first lateral section of the peripheral portion of the n-th transfer element.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBANyKxIzVFILCpKrFQoLk0qLilKLEnlYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxocGGhqbmJpbGpk5GxsSoAQCE-CF0</recordid><startdate>20230207</startdate><enddate>20230207</enddate><creator>Liao, Chen-Hsien</creator><creator>Cheng, Sheng-Yen</creator><creator>Shih, Ping-Hung</creator><creator>Hsu, Ya-Ling</creator><creator>Lee, Min-Tse</creator><creator>Chung, Yueh-Hung</creator><creator>Tai, Peng-Che</creator><scope>EVB</scope></search><sort><creationdate>20230207</creationdate><title>Pixel array substrate</title><author>Liao, Chen-Hsien ; Cheng, Sheng-Yen ; Shih, Ping-Hung ; Hsu, Ya-Ling ; Lee, Min-Tse ; Chung, Yueh-Hung ; Tai, Peng-Che</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11574935B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2023</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Liao, Chen-Hsien</creatorcontrib><creatorcontrib>Cheng, Sheng-Yen</creatorcontrib><creatorcontrib>Shih, Ping-Hung</creatorcontrib><creatorcontrib>Hsu, Ya-Ling</creatorcontrib><creatorcontrib>Lee, Min-Tse</creatorcontrib><creatorcontrib>Chung, Yueh-Hung</creatorcontrib><creatorcontrib>Tai, Peng-Che</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Liao, Chen-Hsien</au><au>Cheng, Sheng-Yen</au><au>Shih, Ping-Hung</au><au>Hsu, Ya-Ling</au><au>Lee, Min-Tse</au><au>Chung, Yueh-Hung</au><au>Tai, Peng-Che</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Pixel array substrate</title><date>2023-02-07</date><risdate>2023</risdate><abstract>A pixel array substrate, including gate elements and transfer elements, is provided. The gate elements include an n-th gate element and an m-th gate element. The transfer elements include a n-th transfer element and an m-th transfer element electrically connected to the n-th gate element and the m-th gate element respectively. A peripheral portion of each of the transfer elements includes a first straight section. A peripheral portion of the n-th transfer element further includes a first lateral section. The first lateral section of the n-th transfer element and the first straight section of the n-th transfer element respectively belong to a first conductive layer and a second conductive layer. A peripheral portion of the m-th transfer element crosses over the first lateral section of the peripheral portion of the n-th transfer element.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US11574935B2
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Pixel array substrate
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-14T13%3A20%3A55IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Liao,%20Chen-Hsien&rft.date=2023-02-07&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS11574935B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true