Software assisted power management
Embodiments include an apparatus comprising an execution unit coupled to a memory, a microcode controller, and a hardware controller. The microcode controller is to identify a global power and performance hint in an instruction stream that includes first and second instruction phases to be executed...
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creator | Yang, Andrew Kaushik, Mayank Bansal, Yogesh Ramani, Sundar Iyer, Mrinal Wu, Olivia K Schebye, Tom Kim, Jason Seung-Min Garegrat, Nitin N |
description | Embodiments include an apparatus comprising an execution unit coupled to a memory, a microcode controller, and a hardware controller. The microcode controller is to identify a global power and performance hint in an instruction stream that includes first and second instruction phases to be executed in parallel, identify a local hint based on synchronization dependence in the first instruction phase, and use the first local hint to balance power consumption between the execution unit and the memory during parallel executions of the first and second instruction phases. The hardware controller is to use the global hint to determine an appropriate voltage level of a compute voltage and a frequency of a compute clock signal for the execution unit during the parallel executions of the first and second instruction phases. The first local hint includes a processing rate for the first instruction phase or an indication of the processing rate. |
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The microcode controller is to identify a global power and performance hint in an instruction stream that includes first and second instruction phases to be executed in parallel, identify a local hint based on synchronization dependence in the first instruction phase, and use the first local hint to balance power consumption between the execution unit and the memory during parallel executions of the first and second instruction phases. The hardware controller is to use the global hint to determine an appropriate voltage level of a compute voltage and a frequency of a compute clock signal for the execution unit during the parallel executions of the first and second instruction phases. The first local hint includes a processing rate for the first instruction phase or an indication of the processing rate.</description><language>eng</language><subject>CALCULATING ; COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230131&DB=EPODOC&CC=US&NR=11567555B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230131&DB=EPODOC&CC=US&NR=11567555B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Yang, Andrew</creatorcontrib><creatorcontrib>Kaushik, Mayank</creatorcontrib><creatorcontrib>Bansal, Yogesh</creatorcontrib><creatorcontrib>Ramani, Sundar</creatorcontrib><creatorcontrib>Iyer, Mrinal</creatorcontrib><creatorcontrib>Wu, Olivia K</creatorcontrib><creatorcontrib>Schebye, Tom</creatorcontrib><creatorcontrib>Kim, Jason Seung-Min</creatorcontrib><creatorcontrib>Garegrat, Nitin N</creatorcontrib><title>Software assisted power management</title><description>Embodiments include an apparatus comprising an execution unit coupled to a memory, a microcode controller, and a hardware controller. The microcode controller is to identify a global power and performance hint in an instruction stream that includes first and second instruction phases to be executed in parallel, identify a local hint based on synchronization dependence in the first instruction phase, and use the first local hint to balance power consumption between the execution unit and the memory during parallel executions of the first and second instruction phases. The hardware controller is to use the global hint to determine an appropriate voltage level of a compute voltage and a frequency of a compute clock signal for the execution unit during the parallel executions of the first and second instruction phases. The first local hint includes a processing rate for the first instruction phase or an indication of the processing rate.</description><subject>CALCULATING</subject><subject>COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFAKzk8rKU8sSlVILC7OLC5JTVEoyC9PLVLITcxLTE_NTc0r4WFgTUvMKU7lhdLcDIpuriHOHrqpBfnxqcUFicmpeakl8aHBhoamZuampqZORsbEqAEA3P4mmA</recordid><startdate>20230131</startdate><enddate>20230131</enddate><creator>Yang, Andrew</creator><creator>Kaushik, Mayank</creator><creator>Bansal, Yogesh</creator><creator>Ramani, Sundar</creator><creator>Iyer, Mrinal</creator><creator>Wu, Olivia K</creator><creator>Schebye, Tom</creator><creator>Kim, Jason Seung-Min</creator><creator>Garegrat, Nitin N</creator><scope>EVB</scope></search><sort><creationdate>20230131</creationdate><title>Software assisted power management</title><author>Yang, Andrew ; Kaushik, Mayank ; Bansal, Yogesh ; Ramani, Sundar ; Iyer, Mrinal ; Wu, Olivia K ; Schebye, Tom ; Kim, Jason Seung-Min ; Garegrat, Nitin N</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11567555B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2023</creationdate><topic>CALCULATING</topic><topic>COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>Yang, Andrew</creatorcontrib><creatorcontrib>Kaushik, Mayank</creatorcontrib><creatorcontrib>Bansal, Yogesh</creatorcontrib><creatorcontrib>Ramani, Sundar</creatorcontrib><creatorcontrib>Iyer, Mrinal</creatorcontrib><creatorcontrib>Wu, Olivia K</creatorcontrib><creatorcontrib>Schebye, Tom</creatorcontrib><creatorcontrib>Kim, Jason Seung-Min</creatorcontrib><creatorcontrib>Garegrat, Nitin N</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Yang, Andrew</au><au>Kaushik, Mayank</au><au>Bansal, Yogesh</au><au>Ramani, Sundar</au><au>Iyer, Mrinal</au><au>Wu, Olivia K</au><au>Schebye, Tom</au><au>Kim, Jason Seung-Min</au><au>Garegrat, Nitin N</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Software assisted power management</title><date>2023-01-31</date><risdate>2023</risdate><abstract>Embodiments include an apparatus comprising an execution unit coupled to a memory, a microcode controller, and a hardware controller. The microcode controller is to identify a global power and performance hint in an instruction stream that includes first and second instruction phases to be executed in parallel, identify a local hint based on synchronization dependence in the first instruction phase, and use the first local hint to balance power consumption between the execution unit and the memory during parallel executions of the first and second instruction phases. The hardware controller is to use the global hint to determine an appropriate voltage level of a compute voltage and a frequency of a compute clock signal for the execution unit during the parallel executions of the first and second instruction phases. The first local hint includes a processing rate for the first instruction phase or an indication of the processing rate.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | CALCULATING COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | Software assisted power management |
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